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[RISC-V] Simplifying the loop generated in genZeroInitFrameUsingBlockInit
arch-riscv
Related to the RISC-V architecture
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
community-contribution
Indicates that the PR has been added by a community member
#116011
opened May 27, 2025 by
sirntar
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[RISC-V] Reverse unordered FP comparisons in branches
arch-riscv
Related to the RISC-V architecture
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
community-contribution
Indicates that the PR has been added by a community member
#115943
opened May 23, 2025 by
tomeksowi
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[RISC-V][LoongArch64] Handle reversed fields in lowered structs
arch-loongarch64
arch-riscv
Related to the RISC-V architecture
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
community-contribution
Indicates that the PR has been added by a community member
#115933
opened May 23, 2025 by
tomeksowi
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[RISC-V] Introduce Zbs
arch-riscv
Related to the RISC-V architecture
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
community-contribution
Indicates that the PR has been added by a community member
#115335
opened May 6, 2025 by
tomeksowi
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[RISC-V] Optimize Related to the RISC-V architecture
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
community-contribution
Indicates that the PR has been added by a community member
emitLoadImmediate
further
arch-riscv
[RISC-V] Need to configure target RISC-V extension for coreclr build
arch-riscv
Related to the RISC-V architecture
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
untriaged
New issue has not been triaged by the area owner
#115296
opened May 5, 2025 by
fuad1502
Bug in Task Parallel Library on RISC-V Banana Pie K1 8 cores
arch-riscv
Related to the RISC-V architecture
area-System.Threading
[RISC-V] Test build doesn't make crossgen2 executable in RISC-V.
arch-riscv
Related to the RISC-V architecture
area-crossgen2-coreclr
untriaged
New issue has not been triaged by the area owner
#108973
opened Oct 17, 2024 by
clamp03
[RISC-V] FP structs larger than 16 bytes in interops
arch-riscv
Related to the RISC-V architecture
area-System.Runtime.InteropServices
[LoongArch64/RiscV] Add memory barriers to native AOT asm helpers
arch-loongarch64
arch-riscv
Related to the RISC-V architecture
area-NativeAOT-coreclr
[RISCV,QEMU] On QEMU reading from /proc/pid/stat file returns strange values
arch-riscv
Related to the RISC-V architecture
area-System.Diagnostics.Process
[RISC-V] Turn on "V" in zlib-ng compilation
arch-riscv
Related to the RISC-V architecture
area-System.IO.Compression
System.Net.Sockets.Tests.SocketOptionNameTest failures on Qemu
arch-riscv
Related to the RISC-V architecture
area-System.Net.Sockets
System.Net.Sockets.Tests.KeepAliveTest failures on Qemu
arch-riscv
Related to the RISC-V architecture
area-System.Net.Sockets
System.Net.Sockets.Tests.ArgumentValidation failures on Qemu
arch-riscv
Related to the RISC-V architecture
area-System.Net.Sockets
Loongarch/riscV: ThreadLocal optimization during JIT should detect static/dynamic resolver
arch-riscv
Related to the RISC-V architecture
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
[RISC-V] Re-enable WriteXorExecute on riscv64 architecture.
arch-riscv
Related to the RISC-V architecture
area-VM-coreclr
Failed to build tests for libs on Riscv64
arch-riscv
Related to the RISC-V architecture
area-Infrastructure
Generate DLLs whit wrong arch when cross build regression test
arch-riscv
Related to the RISC-V architecture
area-Build-mono
untriaged
New issue has not been triaged by the area owner
#97265
opened Jan 21, 2024 by
Xinlong-Wu
[RISCV] Mono RISC-V porting progress tracing
arch-riscv
Related to the RISC-V architecture
area-VM-meta-mono
#96117
opened Dec 18, 2023 by
Xinlong-Wu
7 tasks
coreclr_initialize failed on RISC-V (error 0x8007000E)
arch-riscv
Related to the RISC-V architecture
area-VM-coreclr
CoreCLR RISC-V architecture port
arch-riscv
Related to the RISC-V architecture
area-Meta
help wanted
[up-for-grabs] Good issue for external contributors
RISC-V support
arch-riscv
Related to the RISC-V architecture
area-VM-meta-mono
help wanted
[up-for-grabs] Good issue for external contributors
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