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engineer-linengineer-lin
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Update LA66 v1.3
1.Compatible with the newer version of the ASR6601 chip. 2.Fixed the DR2 downlink limit of AS923 frequency to 11 bytes when AT+DWELLT=1. 3.Added Lora wireless upgrade program with bootload.
1 parent 7f19188 commit bc58f75

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23 files changed

+224
-81
lines changed

23 files changed

+224
-81
lines changed

‎Drivers/peripheral/inc/tremo_rcc.h‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,8 @@ extern "C" {
2828
#define RCC_FREQ_32M ((uint32_t)32000000)
2929
#define RCC_FREQ_30M ((uint32_t)30000000)
3030
#define RCC_FREQ_24M ((uint32_t)24000000)
31-
#define RCC_FREQ_4M ((uint32_t)4000000)
32-
#define RCC_FREQ_32768 ((uint32_t)32768)
33-
#define RCC_FREQ_32000 ((uint32_t)32000)
31+
#define RCC_FREQ_4M ((uint32_t)3600000)
32+
#define RCC_FREQ_32768 ((uint32_t)32768)
3433

3534
#define RCC_WAIT() \
3635
do { \

‎Drivers/peripheral/inc/tremo_regs.h‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -464,8 +464,8 @@ typedef struct __RTC {
464464
__IO uint32_t CALENDAR_H; /*!< time year/month/date*/
465465
__IO uint32_t CYC_MAX; /*!< cyc max value*/
466466
__IO uint32_t SR; /*!< status register*/
467-
__I uint32_t SYN_DATA; /*!< syncronization time hour/minute/second*/
468-
__I uint32_t SYN_DATA_H; /*!< syncronization time year/month/date*/
467+
__I uint32_t ASYN_DATA; /*!< asynchronization time hour/minute/second*/
468+
__I uint32_t ASYN_DATA_H; /*!< asynchronization time year/month/date*/
469469
__IO uint32_t CR1; /*!< control register 1*/
470470
__IO uint32_t SR1; /*!< status register 1*/
471471
__IO uint32_t CR2; /*!< control register 2*/
@@ -524,11 +524,11 @@ typedef struct {
524524

525525
#define UART_CR_UART_EN ((uint32_t)0x00000001)
526526

527-
#define UART_CR_UART_MODE ((uint32_t)0x00000030)
527+
#define UART_CR_UART_MODE ((uint32_t)0x00000300)
528528
#define UART_CR_UART_MODE_NONE ((uint32_t)0x00000000)
529-
#define UART_CR_UART_MODE_RX ((uint32_t)0x00000020)
530-
#define UART_CR_UART_MODE_TX ((uint32_t)0x00000010)
531-
#define UART_CR_UART_MODE_TXRX ((uint32_t)0x00000030)
529+
#define UART_CR_UART_MODE_RX ((uint32_t)0x00000200)
530+
#define UART_CR_UART_MODE_TX ((uint32_t)0x00000100)
531+
#define UART_CR_UART_MODE_TXRX ((uint32_t)0x00000300)
532532

533533
#define UART_CR_FLOW_CTRL ((uint32_t)0x0000C000)
534534
#define UART_CR_FLOW_CTRL_NONE ((uint32_t)0x00000000)

‎Drivers/peripheral/inc/tremo_spi.h‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@ extern "C" {
5151
#define SSP_INTERRUPT_RX_TIMEOUT (1 << 1) /*!< RX timeout interrupt*/
5252
#define SSP_INTERRUPT_RX_FIFO_TRIGGER (1 << 2) /*!< RX fifo trigger interrupt*/
5353
#define SSP_INTERRUPT_TX_FIFO_TRIGGER (1 << 3) /*!< TX fifo trigger interrupt*/
54+
#define SSP_INTERRUPT_RX_OVERRUN_AND_TIMEOUT (0x3) /*!< RX fifo overrun and RX timeout interrupt*/
5455
#define SSP_INTERRUPT_ALL (0xf) /*!< All interrupt*/
5556

5657
#define SSP_DMA_TX_EN (1 << 1) /*!< TX DMA enable*/
@@ -76,9 +77,7 @@ typedef struct {
7677
* @param ssp_interrupt SSP interrupt
7778
* @arg SSP_INTERRUPT_RX_FIFO_OVERRUN: RX fifo overrun interrupt
7879
* @arg SSP_INTERRUPT_RX_TIMEOUT: RX timeout interrupt
79-
* @arg SSP_INTERRUPT_RX_FIFO_TRIGGER: RX fifo trigger interrupt
80-
* @arg SSP_INTERRUPT_TX_FIFO_TRIGGER: TX fifo trigger interrupt
81-
* @arg SSP_INTERRUPT_ALL: All interrupt
80+
* @arg SSP_INTERRUPT_RX_OVERRUN_AND_TIMEOUT: RX fifo overrun and RX timeout interrupt
8281
* @return
8382
*/
8483
__STATIC_INLINE void ssp_clear_interrupt(ssp_typedef_t* SSPx, uint8_t ssp_interrupt)

‎Drivers/peripheral/src/tremo_dma.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -78,9 +78,6 @@ void dma0_IRQHandler(void)
7878
dma_ch = 3;
7979
}
8080

81-
if (g_dma_callback_handler[0][dma_ch]) {
82-
g_dma_callback_handler[0][dma_ch]();
83-
}
8481
if (dma_ch == 0) {
8582
/*clear TFR int,channelx*/
8683
TREMO_REG_WR(DMA_CLEAR_TFR_L_REG(0), 0x1);
@@ -102,6 +99,9 @@ void dma0_IRQHandler(void)
10299
/*clear block int,channelx*/
103100
TREMO_REG_WR(DMA_CLEAR_BLOCK_L_REG(0), 0x8);
104101
}
102+
if (g_dma_callback_handler[0][dma_ch]) {
103+
g_dma_callback_handler[0][dma_ch]();
104+
}
105105
}
106106

107107
void dma1_IRQHandler(void)
@@ -118,9 +118,6 @@ void dma1_IRQHandler(void)
118118
dma_ch = 3;
119119
}
120120

121-
if (g_dma_callback_handler[1][dma_ch]) {
122-
g_dma_callback_handler[1][dma_ch]();
123-
}
124121
if (dma_ch == 0) {
125122
/*clear TFR int,channelx*/
126123
TREMO_REG_WR(DMA_CLEAR_TFR_L_REG(1), 0x1);
@@ -142,6 +139,9 @@ void dma1_IRQHandler(void)
142139
/*clear block int,channelx*/
143140
TREMO_REG_WR(DMA_CLEAR_BLOCK_L_REG(1), 0x8);
144141
}
142+
if (g_dma_callback_handler[1][dma_ch]) {
143+
g_dma_callback_handler[1][dma_ch]();
144+
}
145145
}
146146

147147
static void set_dma_mode(dma_dev_t* dma, dma_config_reg_t* config_reg)

‎Drivers/peripheral/src/tremo_gpio.c‎

Lines changed: 31 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,7 @@ void gpio_init(gpio_t* gpiox, uint8_t gpio_pin, gpio_mode_t mode)
9797
gpiox->ODR &= ~(1 << gpio_pin);
9898
gpiox->IER &= ~(1 << gpio_pin);
9999
gpiox->OER |= (1 << gpio_pin);
100-
gpiox->PSR &= ~(1 << gpio_pin);
100+
gpiox->PSR |= (1 << gpio_pin);
101101
} else {
102102
gpiox->OER &= ~(1 << gpio_pin);
103103
gpiox->IER &= ~(1 << gpio_pin);
@@ -111,7 +111,7 @@ void gpio_init(gpio_t* gpiox, uint8_t gpio_pin, gpio_mode_t mode)
111111
gpiox->ODR &= ~(1 << gpio_pin);
112112
gpiox->IER &= ~(1 << gpio_pin);
113113
gpiox->OER &= ~(1 << gpio_pin);
114-
gpiox->PSR &= ~(1 << gpio_pin);
114+
gpiox->PSR |= (1 << gpio_pin);
115115
} else {
116116
gpiox->OER &= ~(1 << gpio_pin);
117117
gpiox->IER &= ~(1 << gpio_pin);
@@ -160,11 +160,35 @@ void gpio_init(gpio_t* gpiox, uint8_t gpio_pin, gpio_mode_t mode)
160160
void gpio_write(gpio_t* gpiox, uint8_t gpio_pin, gpio_level_t level)
161161
{
162162
assert_param(IS_GPIO_PIN(gpiox, gpio_pin));
163-
164-
if (level != GPIO_LEVEL_LOW)
165-
gpiox->BSR |= 1 << gpio_pin;
166-
else
167-
gpiox->BRR |= 1 << gpio_pin;
163+
if (gpiox == GPIOD && gpio_pin > GPIO_PIN_7) {
164+
if (((gpiox->ODR & (1 << gpio_pin)) == 0 ) && ((gpiox->IER & (1 << gpio_pin)) == 0 ) \
165+
&& ((gpiox->OER & (1 << gpio_pin)) != 0) && ((gpiox->PSR & (1 << gpio_pin)) != 0)) {
166+
if (level == GPIO_LEVEL_LOW) {
167+
gpiox->ODR &= ~(1 << gpio_pin);
168+
gpiox->IER &= ~(1 << gpio_pin);
169+
gpiox->OER &= ~(1 << gpio_pin);
170+
gpiox->PSR |= (1 << gpio_pin);
171+
}
172+
} else if (((gpiox->ODR & (1 << gpio_pin)) == 0 ) && ((gpiox->IER & (1 << gpio_pin)) == 0 ) && \
173+
((gpiox->OER & (1 << gpio_pin)) == 0) && ((gpiox->PSR & (1 << gpio_pin)) != 0)) {
174+
if (level != GPIO_LEVEL_LOW) {
175+
gpiox->ODR &= ~(1 << gpio_pin);
176+
gpiox->IER &= ~(1 << gpio_pin);
177+
gpiox->OER |= (1 << gpio_pin);
178+
gpiox->PSR |= (1 << gpio_pin);
179+
}
180+
} else {
181+
if (level != GPIO_LEVEL_LOW)
182+
gpiox->BSR |= 1 << gpio_pin;
183+
else
184+
gpiox->BRR |= 1 << gpio_pin;
185+
}
186+
} else {
187+
if (level != GPIO_LEVEL_LOW)
188+
gpiox->BSR |= 1 << gpio_pin;
189+
else
190+
gpiox->BRR |= 1 << gpio_pin;
191+
}
168192
}
169193

170194
/**

‎Drivers/peripheral/src/tremo_lpuart.c‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -217,12 +217,10 @@ void lpuart_init(lpuart_t* lpuart, lpuart_init_t* uart_init)
217217
uint32_t freq = 0;
218218

219219
lpuart_clk_freq = rcc_get_lpuart_clk_source();
220-
if (lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_XO32K) {
221-
freq = 32768;
222-
} else if (lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_RCO32K) {
223-
freq = 32000;
220+
if (lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_XO32K || lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_RCO32K) {
221+
freq = RCC_FREQ_32768;
224222
} else {
225-
freq = 4000000;
223+
freq = RCC_FREQ_4M;
226224
}
227225
if (uart_init->low_level_wakeup == true) {
228226
tmp_value |= LPUART_CR0_LOW_LEVEL_WAKEUP;

‎Drivers/peripheral/src/tremo_pwr.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,8 @@
1010

1111
void deepsleep(uint32_t mode, uint32_t wfi)
1212
{
13+
PWR->CR1 |= 1<<4;
14+
1315
if((TREMO_REG_RD(0x10002010) & 0x3) == 0)
1416
TREMO_REG_SET(PWR->CR1, (0xF<<20), (1<<20));
1517

‎Drivers/peripheral/src/tremo_rcc.c‎

Lines changed: 31 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#include "tremo_delay.h"
12
#include "tremo_rcc.h"
23

34
/**
@@ -17,10 +18,7 @@ uint32_t rcc_get_clk_freq(rcc_clk_t clk)
1718
sysclk_freq = RCC_FREQ_48M;
1819
break;
1920
}
20-
case RCC_CR0_SYSCLK_SEL_RCO32K: {
21-
sysclk_freq = RCC_FREQ_32000;
22-
break;
23-
}
21+
case RCC_CR0_SYSCLK_SEL_RCO32K:
2422
case RCC_CR0_SYSCLK_SEL_XO32K: {
2523
sysclk_freq = RCC_FREQ_32768;
2624
break;
@@ -328,6 +326,7 @@ void rcc_set_lptimer0_clk_source(rcc_lptimer0_clk_source_t clk_source)
328326
if (clk_source == RCC_LPTIMER0_CLK_SOURCE_EXTCLK) {
329327
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER0_EXTCLK_SEL_MASK, true);
330328
} else {
329+
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER0_EXTCLK_SEL_MASK, false);
331330
TREMO_REG_SET(RCC->CR1, RCC_CR1_LPTIMER0_CLK_SEL_MASK, clk_source);
332331
}
333332
}
@@ -354,6 +353,7 @@ void rcc_set_lptimer1_clk_source(rcc_lptimer1_clk_source_t clk_source)
354353
if (clk_source == RCC_LPTIMER1_CLK_SOURCE_EXTCLK) {
355354
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER1_EXTCLK_SEL_MASK, true);
356355
} else {
356+
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER1_EXTCLK_SEL_MASK, false);
357357
TREMO_REG_SET(RCC->CR1, RCC_CR1_LPTIMER1_CLK_SEL_MASK, clk_source);
358358
}
359359
}
@@ -812,6 +812,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
812812
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
813813
;
814814
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPUART_AON_CLK_EN_MASK, new_state);
815+
while ((RCC->SR & RCC_SR_LPUART_AON_CLK_EN_DONE) != RCC_SR_LPUART_AON_CLK_EN_DONE)
816+
;
815817
break;
816818
}
817819
case RCC_PERIPHERAL_SSP0: {
@@ -860,6 +862,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
860862
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
861863
;
862864
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LCD_AON_CLK_EN_MASK, new_state);
865+
while ((RCC->SR & RCC_SR_LCD_AON_CLK_EN_DONE) != RCC_SR_LCD_AON_CLK_EN_DONE)
866+
;
863867
break;
864868
}
865869
case RCC_PERIPHERAL_LORA: {
@@ -913,6 +917,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
913917
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
914918
;
915919
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER0_AON_CLK_EN_MASK, new_state);
920+
while ((RCC->SR & RCC_SR_LPTIM_AON_CLK_EN_DONE) != RCC_SR_LPTIM_AON_CLK_EN_DONE)
921+
;
916922

917923
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER0_CLK_EN_MASK, new_state);
918924
} else {
@@ -921,8 +927,10 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
921927
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
922928
;
923929
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER0_AON_CLK_EN_MASK, new_state);
930+
while ((RCC->SR & RCC_SR_LPTIM_AON_CLK_EN_DONE) != RCC_SR_LPTIM_AON_CLK_EN_DONE)
931+
;
924932

925-
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER0_PCLK_EN_MASK, new_state);
933+
//TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER0_PCLK_EN_MASK, new_state);
926934
}
927935

928936
break;
@@ -935,6 +943,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
935943
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
936944
;
937945
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER1_AON_CLK_EN_MASK, new_state);
946+
while ((RCC->SR & RCC_SR_LPTIMER1_AON_CLK_EN_DONE) != RCC_SR_LPTIMER1_AON_CLK_EN_DONE)
947+
;
938948

939949
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER1_CLK_EN_MASK, new_state);
940950
} else {
@@ -943,8 +953,10 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
943953
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
944954
;
945955
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER1_AON_CLK_EN_MASK, new_state);
956+
while ((RCC->SR & RCC_SR_LPTIMER1_AON_CLK_EN_DONE) != RCC_SR_LPTIMER1_AON_CLK_EN_DONE)
957+
;
946958

947-
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER1_PCLK_EN_MASK, new_state);
959+
//TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER1_PCLK_EN_MASK, new_state);
948960
}
949961

950962
break;
@@ -955,6 +967,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
955967
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
956968
;
957969
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_IWDG_CLK_EN_MASK, new_state);
970+
while ((RCC->SR & RCC_SR_IWDG_AON_CLK_EN_DONE) != RCC_SR_IWDG_AON_CLK_EN_DONE)
971+
;
958972

959973
break;
960974
}
@@ -969,6 +983,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
969983
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
970984
;
971985
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_RTC_AON_CLK_EN_MASK, new_state);
986+
while ((RCC->SR & RCC_SR_RTC_AON_CLK_EN_DONE) != RCC_SR_RTC_AON_CLK_EN_DONE)
987+
;
972988
break;
973989
}
974990
case RCC_PERIPHERAL_CRC: {
@@ -1085,6 +1101,15 @@ void rcc_rst_peripheral(rcc_peripheral_t peripheral, bool new_state)
10851101

10861102
TREMO_REG_EN(RCC->RST0, 1 << pos, !new_state);
10871103
}
1104+
1105+
if((!new_state) && (peripheral == RCC_PERIPHERAL_LPTIMER1 ||
1106+
peripheral == RCC_PERIPHERAL_LPTIMER0 ||
1107+
peripheral == RCC_PERIPHERAL_LCD ||
1108+
peripheral == RCC_PERIPHERAL_RTC ||
1109+
peripheral == RCC_PERIPHERAL_IWDG ||
1110+
peripheral == RCC_PERIPHERAL_LPUART)) {
1111+
delay_us(92);
1112+
}
10881113
}
10891114

10901115
/**

‎Drivers/peripheral/src/tremo_rtc.c‎

Lines changed: 3 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -445,7 +445,7 @@ void rtc_get_calendar(rtc_calendar_t* rtc_calendar)
445445
uint32_t syn_data_h;
446446
uint8_t temp;
447447
uint16_t subsecond_cnt;
448-
float subsecond;
448+
float subsecond = 0;
449449

450450
if (rtc_calendar == NULL) {
451451
return;
@@ -460,11 +460,7 @@ void rtc_get_calendar(rtc_calendar_t* rtc_calendar)
460460
} while (syn_data_h != RTC->CALENDAR_R_H);
461461
} while ((subsecond_cnt != rtc_get_subsecond_cnt()) || subsecond_cnt<1);
462462

463-
if (RCC_RTC_CLK_SOURCE_XO32K == rcc_get_rtc_clk_source()) {
464-
subsecond = ((float)(((float)RTC_MICROSECOND) / 32768) * subsecond_cnt) + 0.5;
465-
} else {
466-
subsecond = ((float)(((float)RTC_MICROSECOND) / 32000) * subsecond_cnt) + 0.5;
467-
}
463+
subsecond = ((float)(((float)RTC_MICROSECOND) / 32768) * subsecond_cnt) + 0.5;
468464
rtc_calendar->subsecond = (uint32_t)subsecond;
469465

470466
temp = syn_data & 0x0F;
@@ -605,11 +601,7 @@ void rtc_set_alarm(uint8_t alarm_index, rtc_alarm_mask_t* alarm_mask, rtc_calend
605601
return;
606602
}
607603
if (alarm_mask->subsecMask != 0) {
608-
if (RCC_RTC_CLK_SOURCE_XO32K == rcc_get_rtc_clk_source()) {
609-
temp = ((float)(time->subsecond)) / ((float)(((float)RTC_MICROSECOND) / 32768)) + 0.5;
610-
} else {
611-
temp = ((float)(time->subsecond)) / ((float)(((float)RTC_MICROSECOND) / 32000)) + 0.5;
612-
}
604+
temp = ((float)(time->subsecond)) / ((float)(((float)RTC_MICROSECOND) / 32768)) + 0.5;
613605
rtc_check_syn();
614606
*alarm_subsec_reg &= 0xFFFF0000;
615607
rtc_check_syn();

‎Drivers/peripheral/src/tremo_timer.c‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -789,8 +789,14 @@ int32_t timer_clear_ocxref(timer_gp_t* TIMERx, timer_clear_ocxref_t* clear_ocxre
789789
*/
790790
void timer_config_pwm(timer_gp_t* TIMERx, timer_oc_init_t* oc_init, timer_init_t* timerx_init, uint8_t channel)
791791
{
792-
if (((oc_init->oc_mode).oc0m_mode != TIMER_OC0M_PWM1) && ((oc_init->oc_mode).oc0m_mode != TIMER_OC0M_PWM2)) {
793-
return;
792+
if ((channel == 0) || (channel == 2)) {
793+
if (((oc_init->oc_mode).oc0m_mode != TIMER_OC0M_PWM1) && ((oc_init->oc_mode).oc0m_mode != TIMER_OC0M_PWM2)) {
794+
return;
795+
}
796+
} else {
797+
if (((oc_init->oc_mode).oc1m_mode != TIMER_OC1M_PWM1) && ((oc_init->oc_mode).oc1m_mode != TIMER_OC1M_PWM2)) {
798+
return;
799+
}
794800
}
795801

796802
timer_config_oc(TIMERx, oc_init, channel);

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