apply correct (?) H7 ADC errata fix

Author: mck1117

firmware/hw_layer/ports/stm32/stm32_adc_v4.cpp

@@ -97,7 +97,9 @@ static constexpr ADCConversionGroup convGroupSlow = {
 	.num_channels		= slowChannelCount,
 	.end_cb				= adc_callback,
 	.error_cb			= nullptr,
-	.cfgr				= ADC_CFGR_EXTEN_0 | (4 << ADC_CFGR_EXTSEL_Pos),	// External trigger ch4, rising edge: TIM3 TRGO
+	// OVRMOD=1 is required by H7 errata "ADC slave data may be shifted in Dual regular simultaneous mode" -
+	// without it, a single-DMA-channel read of CDR can leave the slave's samples offset from the master's.
+	.cfgr = ADC_CFGR_EXTEN_0 | (4 << ADC_CFGR_EXTSEL_Pos) | ADC_CFGR_OVRMOD, // External trigger ch4, rising edge: TIM3 TRGO
 	.cfgr2				= 	(H7_ADC_OVERSAMPLE - 1) << ADC_CFGR2_OVSR_Pos |	// Oversample by Nx (register contains N-1)
 							H7_ADC_SHIFT_BITS << ADC_CFGR2_OVSS_Pos |		// shift the result right log2(N) bits to make a 16 bit result out of the internal oversample sum
 							ADC_CFGR2_ROVSE,			// Enable oversampling