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ports: stm32h7: implement spiCalcClockDiv()
1 parent 25d425a commit f389069

2 files changed

Lines changed: 92 additions & 10 deletions

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firmware/hw_layer/hardware.h

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,19 @@ void stopHardware();
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1414
#if HAL_USE_SPI
1515

16+
#ifdef STM32H7XX
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18+
#define SPI_BaudRatePrescaler_2 (0x0UL << SPI_CFG1_MBR_Pos)
19+
#define SPI_BaudRatePrescaler_4 (0x1UL << SPI_CFG1_MBR_Pos)
20+
#define SPI_BaudRatePrescaler_8 (0x2UL << SPI_CFG1_MBR_Pos)
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#define SPI_BaudRatePrescaler_16 (0x3UL << SPI_CFG1_MBR_Pos)
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#define SPI_BaudRatePrescaler_32 (0x4UL << SPI_CFG1_MBR_Pos)
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#define SPI_BaudRatePrescaler_64 (0x5UL << SPI_CFG1_MBR_Pos)
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#define SPI_BaudRatePrescaler_128 (0x6UL << SPI_CFG1_MBR_Pos)
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#define SPI_BaudRatePrescaler_256 (0x7UL << SPI_CFG1_MBR_Pos)
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27+
#else /* not STM32H7XX */
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1629
// Peripherial Clock 42MHz SPI2 SPI3
1730
// Peripherial Clock 84MHz SPI1 SPI1 SPI2/3
1831
// 42 MHz 21 MHZ
@@ -32,6 +45,8 @@ void stopHardware();
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// 328.125 KHz 164.06 KHz
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#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
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#endif
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3550
SPIDriver * getSpiDevice(spi_device_e spiDevice);
3651
void turnOnSpi(spi_device_e device);
3752
void lockSpi(spi_device_e device);

firmware/hw_layer/ports/stm32/stm32_spi.cpp

Lines changed: 77 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,83 @@ void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin) {
182182
efiSetPadMode("chip select", csPin, PAL_STM32_MODE_OUTPUT);
183183
}
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185+
#ifdef STM32H7XX
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int spiGetBaseClock(SPIDriver *spip)
188+
{
189+
#if STM32_SPI_USE_SPI1
190+
if (spip == &SPID1) {
191+
return STM32_SPI1CLK;
192+
}
193+
#endif
194+
#if STM32_SPI_USE_SPI2
195+
if (spip == &SPID2) {
196+
return STM32_SPI2CLK;
197+
}
198+
#endif
199+
#if STM32_SPI_USE_SPI3
200+
if (spip == &SPID3) {
201+
return STM32_SPI3CLK;
202+
}
203+
#endif
204+
#if STM32_SPI_USE_SPI4
205+
if (spip == &SPID4) {
206+
return STM32_SPI4CLK;
207+
}
208+
#endif
209+
#if STM32_SPI_USE_SPI5
210+
if (spip == &SPID5) {
211+
return STM32_SPI5CLK;
212+
}
213+
#endif
214+
#if STM32_SPI_USE_SPI6
215+
if (spip == &SPID6) {
216+
return STM32_SPI6CLK;
217+
}
218+
#endif
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220+
return 0;
221+
}
222+
223+
int spiCalcClockDiv(SPIDriver *spip, SPIConfig *spiConfig, unsigned int clk)
224+
{
225+
if (clk == 0) {
226+
return -1;
227+
}
228+
229+
unsigned int baseClock = spiGetBaseClock(spip);
230+
231+
if (baseClock == 0) {
232+
return -1;
233+
}
234+
235+
// round down
236+
int div = (baseClock + clk - 1) / clk;
237+
238+
spiConfig->cfg1 &= ~SPI_CFG1_MBR_Msk;
239+
if (div <= 2) {
240+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_2;
241+
} else if (div <= 4) {
242+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_4;
243+
} else if (div <= 8) {
244+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_8;
245+
} else if (div <= 16) {
246+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_16;
247+
} else if (div <= 32) {
248+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_32;
249+
} else if (div <= 64) {
250+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_64;
251+
} else if (div <= 128) {
252+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_128;
253+
} else {
254+
spiConfig->cfg1 |= SPI_BaudRatePrescaler_256;
255+
}
256+
257+
return 0;
258+
}
259+
260+
#else
261+
185262
int spiGetBaseClock(SPIDriver *spip)
186263
{
187264
#if STM32_SPI_USE_SPI1
@@ -224,16 +301,6 @@ int spiGetBaseClock(SPIDriver *spip)
224301
return 0;
225302
}
226303

227-
#ifdef STM32H7XX
228-
229-
int spiCalcClockDiv(SPIDriver*, SPIConfig*, unsigned int)
230-
{
231-
// TODO: implement
232-
return -1;
233-
}
234-
235-
#else
236-
237304
int spiCalcClockDiv(SPIDriver *spip, SPIConfig *spiConfig, unsigned int clk)
238305
{
239306
if (clk == 0) {

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