|
| 1 | +/* |
| 2 | + * This file is part of the MicroPython project, http://micropython.org/ |
| 3 | + * |
| 4 | + * The MIT License (MIT) |
| 5 | + * |
| 6 | + * Copyright (c) 2024 Arduino SA |
| 7 | + * |
| 8 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 9 | + * of this software and associated documentation files (the "Software"), to deal |
| 10 | + * in the Software without restriction, including without limitation the rights |
| 11 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 12 | + * copies of the Software, and to permit persons to whom the Software is |
| 13 | + * furnished to do so, subject to the following conditions: |
| 14 | + * |
| 15 | + * The above copyright notice and this permission notice shall be included in |
| 16 | + * all copies or substantial portions of the Software. |
| 17 | + * |
| 18 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 21 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 22 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 23 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 24 | + * THE SOFTWARE. |
| 25 | + * |
| 26 | + * libmetal mimxrt port. |
| 27 | + */ |
| 28 | + |
| 29 | +#include "py/mperrno.h" |
| 30 | +#include "py/mphal.h" |
| 31 | + |
| 32 | +#include "fsl_common.h" |
| 33 | +#include "fsl_mu.h" |
| 34 | +#include CPU_HEADER_H |
| 35 | + |
| 36 | +#include "metal/sys.h" |
| 37 | +#include "metal/utilities.h" |
| 38 | +#include "metal/device.h" |
| 39 | + |
| 40 | +struct metal_state _metal; |
| 41 | +static mp_sched_node_t rproc_notify_node; |
| 42 | + |
| 43 | +#define IRQ_PRI_MU NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 10, 0) |
| 44 | + |
| 45 | +int metal_sys_init(const struct metal_init_params *params) { |
| 46 | + metal_unused(params); |
| 47 | + |
| 48 | + // Init MU. |
| 49 | + MU_Init(MUA); |
| 50 | + |
| 51 | + // Configure and enable MU IRQs. |
| 52 | + MU_ClearStatusFlags(MUA, kMU_GenInt0Flag); |
| 53 | + NVIC_SetPriority(MUA_IRQn, IRQ_PRI_MU); |
| 54 | + NVIC_EnableIRQ(MUA_IRQn); |
| 55 | + MU_EnableInterrupts(MUA, kMU_GenInt0InterruptEnable); |
| 56 | + |
| 57 | + #ifndef VIRTIO_USE_DCACHE |
| 58 | + // If cache management is not enabled, configure the MPU to disable caching |
| 59 | + // for the entire shared memory region. |
| 60 | + ARM_MPU_Disable(); |
| 61 | + MPU->RBAR = ARM_MPU_RBAR(10, METAL_MPU_REGION_BASE); |
| 62 | + // Normal type, not shareable, non-cacheable |
| 63 | + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, METAL_MPU_REGION_SIZE); |
| 64 | + ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk); |
| 65 | + #endif |
| 66 | + |
| 67 | + metal_bus_register(&metal_generic_bus); |
| 68 | + return 0; |
| 69 | +} |
| 70 | + |
| 71 | +void metal_sys_finish(void) { |
| 72 | + NVIC_DisableIRQ(MUA_IRQn); |
| 73 | + metal_bus_unregister(&metal_generic_bus); |
| 74 | +} |
| 75 | + |
| 76 | +unsigned int sys_irq_save_disable(void) { |
| 77 | + return disable_irq(); |
| 78 | +} |
| 79 | + |
| 80 | +void sys_irq_restore_enable(unsigned int state) { |
| 81 | + enable_irq(state); |
| 82 | +} |
| 83 | + |
| 84 | +void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, |
| 85 | + size_t size, unsigned int flags) { |
| 86 | + metal_unused(pa); |
| 87 | + metal_unused(size); |
| 88 | + metal_unused(flags); |
| 89 | + return va; |
| 90 | +} |
| 91 | + |
| 92 | +void metal_machine_cache_flush(void *addr, unsigned int len) { |
| 93 | + SCB_CleanDCache_by_Addr(addr, len); |
| 94 | +} |
| 95 | + |
| 96 | +void metal_machine_cache_invalidate(void *addr, unsigned int len) { |
| 97 | + SCB_InvalidateDCache_by_Addr(addr, len); |
| 98 | +} |
| 99 | + |
| 100 | +int metal_rproc_notify(void *priv, uint32_t id) { |
| 101 | + MU_TriggerInterrupts(MUA, kMU_GenInt0InterruptTrigger); |
| 102 | + return 0; |
| 103 | +} |
| 104 | + |
| 105 | +void MUA_IRQHandler(void) { |
| 106 | + if (MU_GetStatusFlags(MUA) & kMU_GenInt0Flag) { |
| 107 | + MU_ClearStatusFlags(MUA, kMU_GenInt0Flag); |
| 108 | + mp_sched_schedule_node(&rproc_notify_node, openamp_remoteproc_notified); |
| 109 | + } |
| 110 | + __DSB(); |
| 111 | +} |
0 commit comments