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Description
RISC-V CI testing has begun to fail Oct 6, 2025:
15:14:34 26: [----------] 7 tests from JITCrossPlatformsOpCodesTest
15:14:34 26: [ RUN ] JITCrossPlatformsOpCodesTest.UnaryTest
15:14:34 26: [ OK ] JITCrossPlatformsOpCodesTest.UnaryTest (141 ms)
15:14:34 26: [ RUN ] JITCrossPlatformsOpCodesTest.IntegerArithmeticTest
15:14:34 26: [ OK ] JITCrossPlatformsOpCodesTest.IntegerArithmeticTest (186 ms)
15:14:34 26: [ RUN ] JITCrossPlatformsOpCodesTest.MemoryOperationTest
15:14:34 26: [ OK ] JITCrossPlatformsOpCodesTest.MemoryOperationTest (33 ms)
15:14:34 26: [ RUN ] JITCrossPlatformsOpCodesTest.BitwiseTest
15:14:34 26: [ OK ] JITCrossPlatformsOpCodesTest.BitwiseTest (65 ms)
15:14:34 26: [ RUN ] JITCrossPlatformsOpCodesTest.CompareTest
15:14:34 26/29 Test #26: CompilerTest ......................***Exception: Illegal 50.15 sec
15:14:34 test 27
This exception is occurring even on PRs where RISC-V CI testing passed previously.
It is unclear whether this is an actual issue that was exposed recently, or a change to the RISC-V CI nodes.
This failure is only seen on RISC-V.