platform: fix pwm initialization of radxa boards

Signed-off-by: Nascs <[email protected]>

Author: nascs

src/arm/radxa_cm3.c

@@ -98,23 +98,31 @@ mraa_radxa_cm3()
 
     b->pins[3].pwm.parent_id = 2; // pwm2-m1
     b->pins[3].pwm.mux_total = 0;
+    b->pins[3].pwm.pinmap = 0;
     b->pins[5].pwm.parent_id = 1; // pwm1-m1
     b->pins[5].pwm.mux_total = 0;
+    b->pins[5].pwm.pinmap = 0;
     b->pins[11].pwm.parent_id = 0;  // pwm0-m1
     b->pins[11].pwm.mux_total = 0;
+    b->pins[11].pwm.pinmap = 0;
     b->pins[13].pwm.parent_id = 0;  // pwm0-m0
     b->pins[13].pwm.mux_total = 0;
+    b->pins[13].pwm.pinmap = 0;
     b->pins[15].pwm.parent_id = 4;  // pwm4
     b->pins[15].pwm.mux_total = 0;
+    b->pins[15].pwm.pinmap = 0;
     b->pins[31].pwm.parent_id = 6; // pwm6
     b->pins[31].pwm.mux_total = 0;
+    b->pins[31].pwm.pinmap = 0;
     b->pins[32].pwm.parent_id = 11; // pwm11-m1
     b->pins[32].pwm.mux_total = 0;
     b->pins[32].pwm.pinmap = 0;
     b->pins[33].pwm.parent_id = 7; // pwm7
     b->pins[33].pwm.mux_total = 0;
+    b->pins[33].pwm.pinmap = 0;
     b->pins[37].pwm.parent_id = 3; // pwm3
     b->pins[37].pwm.mux_total = 0;
+    b->pins[37].pwm.pinmap = 0;
 
     mraa_radxa_cm3_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
     mraa_radxa_cm3_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3.3V");

src/arm/radxa_e25.c

@@ -98,16 +98,22 @@ mraa_radxa_e25()
 
     b->pins[7].pwm.parent_id = 12;  // pwm12-m0
     b->pins[7].pwm.mux_total = 0;
+    b->pins[7].pwm.pinmap = 0;
     b->pins[11].pwm.parent_id = 14;  // pwm14-m0
     b->pins[11].pwm.mux_total = 0;
+    b->pins[7].pwm.pinmap = 0;
     b->pins[13].pwm.parent_id = 1; // pwm15-m0
     b->pins[13].pwm.mux_total = 0;
+    b->pins[13].pwm.pinmap = 0;
     b->pins[18].pwm.parent_id = 7; // pwm7-m0
     b->pins[18].pwm.mux_total = 0;
+    b->pins[18].pwm.pinmap = 0;
     b->pins[24].pwm.parent_id = 13; // pwm13-m1
     b->pins[24].pwm.mux_total = 0;
+    b->pins[24].pwm.pinmap = 0;
     b->pins[26].pwm.parent_id = 4;  // pwm13-m0
     b->pins[26].pwm.mux_total = 0;
+    b->pins[26].pwm.pinmap = 0;
 
     mraa_radxa_e25_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
     mraa_radxa_e25_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3.3V");

src/arm/radxa_rock_3a.c

@@ -101,26 +101,37 @@ mraa_radxa_rock_3a()
 
     b->pins[7].pwm.parent_id = 1; // PWM1_M1
     b->pins[7].pwm.mux_total = 0;
+    b->pins[7].pwm.pinmap = 0;
     b->pins[11].pwm.parent_id = 14;  // PWM14_M0
     b->pins[11].pwm.mux_total = 0;
+    b->pins[11].pwm.pinmap = 0;
     b->pins[13].pwm.parent_id = 15; // PWM15_IR_M0
     b->pins[13].pwm.mux_total = 0;
+    b->pins[13].pwm.pinmap = 0;
     b->pins[15].pwm.parent_id = 1; // PWM1_M0
     b->pins[15].pwm.mux_total = 0;
+    b->pins[15].pwm.pinmap = 0;
     b->pins[16].pwm.parent_id = 2; // PWM2_M1
     b->pins[16].pwm.mux_total = 0;
+    b->pins[16].pwm.pinmap = 0;
     b->pins[18].pwm.parent_id = 9; // PWM9_M0
     b->pins[18].pwm.mux_total = 0;
+    b->pins[18].pwm.pinmap = 0;
     b->pins[19].pwm.parent_id = 15; // PWM15_IR_M1
     b->pins[19].pwm.mux_total = 0;
+    b->pins[19].pwm.pinmap = 0;
     b->pins[21].pwm.parent_id = 12; // PWM12_M1
     b->pins[21].pwm.mux_total = 0;
+    b->pins[21].pwm.pinmap = 0;
     b->pins[22].pwm.parent_id = 2;  // PWM2_M0
     b->pins[22].pwm.mux_total = 0;
+    b->pins[22].pwm.pinmap = 0;
     b->pins[23].pwm.parent_id = 14; // PWM14_M1
     b->pins[23].pwm.mux_total = 0;
+    b->pins[23].pwm.pinmap = 0;
     b->pins[24].pwm.parent_id = 13; // PWM13_M1
     b->pins[24].pwm.mux_total = 0;
+    b->pins[24].pwm.pinmap = 0;
 
     // hardware V1.3/V1.31
     mraa_radxa_rock_3a_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");

src/arm/radxa_rock_3b.c

@@ -99,26 +99,37 @@ mraa_radxa_rock_3b()
 
     b->pins[7].pwm.parent_id = 1;  // pwm1-m1
     b->pins[7].pwm.mux_total = 0;
+    b->pins[7].pwm.pinmap = 0;
     b->pins[11].pwm.parent_id = 14; // pwm14-m0
     b->pins[11].pwm.mux_total = 0;
+    b->pins[11].pwm.pinmap = 0;
     b->pins[13].pwm.parent_id = 15; // pwm15-m0
     b->pins[13].pwm.mux_total = 0;
+    b->pins[13].pwm.pinmap = 0;
     b->pins[15].pwm.parent_id = 1;  // pwm1-m0
     b->pins[15].pwm.mux_total = 0;
+    b->pins[15].pwm.pinmap = 0;
     b->pins[16].pwm.parent_id = 2; // pwm2-m1
     b->pins[16].pwm.mux_total = 0;
+    b->pins[16].pwm.pinmap = 0;
     b->pins[18].pwm.parent_id = 9;  // pwm9-m0
     b->pins[18].pwm.mux_total = 0;
+    b->pins[18].pwm.pinmap = 0;
     b->pins[19].pwm.parent_id = 15; // pwm15-m1
     b->pins[19].pwm.mux_total = 0;
+    b->pins[19].pwm.pinmap = 0;
     b->pins[21].pwm.parent_id = 12; // pwm12-m1
     b->pins[21].pwm.mux_total = 0;
+    b->pins[21].pwm.pinmap = 0;
     b->pins[22].pwm.parent_id = 2; // pwm2-m0
     b->pins[22].pwm.mux_total = 0;
+    b->pins[22].pwm.pinmap = 0;
     b->pins[23].pwm.parent_id = 14; // pwm14-m1
     b->pins[23].pwm.mux_total = 0;
+    b->pins[23].pwm.pinmap = 0;
     b->pins[24].pwm.parent_id = 13; // pwm13-m1
     b->pins[24].pwm.mux_total = 0;
+    b->pins[24].pwm.pinmap = 0;
 
     mraa_radxa_rock_3b_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
     mraa_radxa_rock_3b_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");

src/arm/radxa_rock_3c.c

@@ -96,16 +96,22 @@ mraa_radxa_rock_3c()
 
     b->pins[7].pwm.parent_id = 14;  // pwm14-m0
     b->pins[7].pwm.mux_total = 0;
+    b->pins[7].pwm.pinmap = 0;
     b->pins[16].pwm.parent_id = 8;  // pwm8-m0
     b->pins[16].pwm.mux_total = 0;
+    b->pins[16].pwm.pinmap = 0;
     b->pins[18].pwm.parent_id = 9;  // pwm9-m0
     b->pins[18].pwm.mux_total = 0;
+    b->pins[18].pwm.pinmap = 0;
     b->pins[21].pwm.parent_id = 12; // pwm12-m1
     b->pins[21].pwm.mux_total = 0;
+    b->pins[21].pwm.pinmap = 0;
     b->pins[23].pwm.parent_id = 14; // pwm14-m1
     b->pins[23].pwm.mux_total = 0;
+    b->pins[23].pwm.pinmap = 0;
     b->pins[24].pwm.parent_id = 13; // pwm13-m1
     b->pins[24].pwm.mux_total = 0;
+    b->pins[24].pwm.pinmap = 0;
 
     mraa_radxa_rock_3c_pininfo(b, 0,  -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
     mraa_radxa_rock_3c_pininfo(b, 1,  -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");