v2.1 issues

[filipswit]

• There is a conflict in I2C bus between IC70 and IC52, on v2.1, address pin A0 on IC70 is changed to '1'
• Logic level mismatch in MMC (3V3)- PS(1V8) interconnection
• varinat need fixes: R532,R546 should be unmounted
• IC54 raise common-mode voltage on CLK0 clockmux input - there is need to add lower bias voltage.