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docs(chip/security): correct secure-boot-lifecycle-evidence to development-prototype status
The doc claimed 'no firmware authentication or lifecycle enforcement' and marked lifecycle/OTP/image-auth/rollback as BLOCKED — all now factually outdated by W2-W9. Update the status and evidence table to point at the real mask-ROM verifier, e1_lc_ctrl/e1_otp_map RTL, DICE chain, provisioning, and negative-evidence transcripts (with their gates). Non-Claims still bar any production/silicon secure-boot or AVB claim. key-ceremony.md is left as a specification (no real HSM exists — operational/physical dependency). Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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packages/chip/docs/security/secure-boot-lifecycle-evidence.md

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# Secure Boot and Lifecycle Evidence
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Status: BLOCKED for production secure boot.
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Status: development secure-boot prototype — host and simulation evidence
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complete; production (silicon) secure boot is not claimed (see Non-Claims).
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This repository currently contains a e1-chip identity ROM, not a secure boot
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implementation. The ROM exposes the platform contract words `OPSO`, `CHIP`,
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contract version `1`, and a boot-vector placeholder. It has no firmware
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authentication or lifecycle enforcement.
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The repository now implements the OPNPHN01 secure-boot chain in firmware and
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RTL with reproducible host/simulation evidence: a constant-time mask-ROM
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verifier, a one-hot lifecycle controller, an OTP controller model, a DICE
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measurement chain, ATE provisioning + readback, and negative-evidence
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rejection transcripts. Production secure boot still depends on silicon — the
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OTP macro, the OpenTitan crypto blocks, and on-die entropy — and is not
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asserted from this evidence.
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## Current Evidence
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| Surface | Local evidence | Security result |
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|---|---|---|
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| Boot ROM identity words | `rtl/bootrom/e1_bootrom.sv` and platform-contract checks | Contract ROM only; not a trust anchor. |
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| Boot ROM write behavior | `verify/cocotb/test_e1_lifecycle.py` writes ROM offsets and verifies reads stay fixed | Negative evidence that the current ROM is immutable through the MMIO path. |
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| Lifecycle state | No lifecycle RTL, registers, pins, or reset straps | BLOCKED. |
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| eFuse/OTP | No fuse macro, fuse shadow registers, or provisioning flow | BLOCKED. |
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| Root key material | No key hash, public key, certificate chain, or device-unique key source | BLOCKED. |
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| Image authentication | No ROM hash parser, signature verifier, manifest parser, or fail-closed branch | BLOCKED. |
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| Rollback protection | No monotonic counter, version fuse, RPMB, or anti-rollback policy | BLOCKED. |
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| Debug authentication | Package debug bridge is a bring-up bus master; no lifecycle-gated authentication | BLOCKED for production debug lock. |
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| Mask-ROM verifier | `fw/boot-rom/secure/{verify,ed25519_ct,sha256,measure}.c`; host KATs `fw/boot-rom/secure/tests/`; `fw/pmc/src/secure_boot.c` | Constant-time Ed25519 + SHA-256 OPNPHN01 verifier; distinct fail-closed halt code per reject path. |
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| Secure-boot negative evidence | `tests/security/negative/` (`secure-boot-negative-evidence-check`) | Reproducible rejection transcripts: unsigned, tampered payload, wrong key, corrupt header, rollback downgrade, revoked key, lifecycle-below-min, debug-locked unlock denial. |
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| Lifecycle state | `rtl/security/lc/e1_lc_ctrl.sv` + `verify/cocotb/test_e1_lc_ctrl.py` (`security-lifecycle-scope-check`) | One-hot BLANK/DEV/MFG/LOCKED/RMA/SCRAP; permitted-transition enforcement + signed debug-auth; sim-verified. Silicon lifecycle controller integration tracked in rot-integration-check. |
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| eFuse/OTP | `rtl/security/otp/e1_otp_map.sv` + `fw/provisioning/e1_provision.py` (`otp-rtl-check`, `provisioning-readback-check`) | 2-of-3 majority read, write-auth controller, parity-fault halt; provisioning + readback model. Silicon OTP macro BLOCKED. |
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| Root key material / DICE | `fw/dice/cdi.c`; `docs/sw/security/dice-chain.md` (`dice-measurement-chain-check`) | UDS->CDI ladder, DeviceID/Alias key derivation, KAT-validated. UDS silicon entropy (SRAM PUF / keymgr) BLOCKED. |
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| Rollback protection | OTP unary rollback slots in `e1_otp_map.sv` + verifier rollback check | Advance-only monotonic counters; verifier rejects downgrade (negative evidence above). |
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| Debug authentication | `e1_lc_ctrl.sv` signed challenge-response (RoT-verified Ed25519, no XOR) | Lifecycle-gated; LOCKED denies direct debug; sim-verified. RoT crypto binding tracked in rot-integration-check. |
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| RoT integration spine | `rtl/security/rot/e1_rot_top.sv` (`rot-integration-check`) | Ibex + OTP + lifecycle + mailbox + reset-sequencer elaborate and test clean. OpenTitan crypto-block integration BLOCKED (named missing dependency). |
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## Required Evidence Before Any Secure-Boot Claim
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Do not claim production secure boot, verified boot, device identity,
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hardware-backed key storage, secure debug, anti-rollback, or Android AVB
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enforcement from the current RTL. Those are future requirements, not present
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features.
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enforcement from this host/simulation prototype. The verifier, lifecycle, OTP,
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DICE, and rollback logic above are development evidence only; production secure
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boot requires silicon (the OTP macro, the OpenTitan crypto blocks, and on-die
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entropy) and the manufacturing key ceremony (`key-ceremony.md`). Android AVB
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enforcement is not yet implemented.

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