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Expand file tree Collapse file tree Original file line number Diff line number Diff line change 1- /**
2- * @file eos_dram.h
3- * @brief DDR/DRAM initialization and training for SoCs with external memory
4- *
5- * Required for Cortex-A class SoCs (i.MX8M, AM64x, RPi4) that use
6- * external DDR/LPDDR. MCUs with on-chip SRAM skip this.
7- */
8-
9- #ifndef EOS_DRAM_H
10- #define EOS_DRAM_H
11-
12- #include "eos_types.h"
13-
14- typedef enum {
15- EOS_DRAM_DDR3 ,
16- EOS_DRAM_DDR3L ,
17- EOS_DRAM_DDR4 ,
18- EOS_DRAM_LPDDR4 ,
19- EOS_DRAM_LPDDR4X ,
20- EOS_DRAM_LPDDR5 ,
21- EOS_DRAM_DDR5
22- } eos_dram_type_t ;
23-
24- typedef struct {
25- eos_dram_type_t type ;
26- uint32_t base_addr ;
27- uint32_t size_bytes ;
28- uint32_t bus_width ; /* 16, 32, 64 */
29- uint32_t clock_mhz ;
30- uint32_t cas_latency ;
31- uint32_t ranks ;
32- uint32_t banks ;
33- bool ecc_enabled ;
34- bool training_done ;
35- } eos_dram_config_t ;
36-
37- typedef struct {
38- uint32_t read_delay ;
39- uint32_t write_delay ;
40- uint32_t dqs_delay ;
41- uint32_t clk_delay ;
42- bool valid ;
43- } eos_dram_training_t ;
44-
45- int eos_dram_init (eos_dram_config_t * cfg );
46- int eos_dram_train (eos_dram_config_t * cfg , eos_dram_training_t * result );
47- int eos_dram_test (const eos_dram_config_t * cfg );
48- void eos_dram_dump (const eos_dram_config_t * cfg );
49-
50- #endif /* EOS_DRAM_H */
1+ /**
2+ * @file eos_dram.h
3+ * @brief DDR/DRAM initialization and training for SoCs with external memory
4+ *
5+ * Required for Cortex-A class SoCs (i.MX8M, AM64x, RPi4) that use
6+ * external DDR/LPDDR. MCUs with on-chip SRAM skip this.
7+ */
8+
9+ #ifndef EOS_DRAM_H
10+ #define EOS_DRAM_H
11+
12+ #include "eos_types.h"
13+
14+ #ifdef __cplusplus
15+ extern "C" {
16+ #endif
17+
18+ typedef enum {
19+ EOS_DRAM_DDR3 ,
20+ EOS_DRAM_DDR3L ,
21+ EOS_DRAM_DDR4 ,
22+ EOS_DRAM_LPDDR4 ,
23+ EOS_DRAM_LPDDR4X ,
24+ EOS_DRAM_LPDDR5 ,
25+ EOS_DRAM_DDR5
26+ } eos_dram_type_t ;
27+
28+ typedef struct {
29+ eos_dram_type_t type ;
30+ uint32_t base_addr ;
31+ uint32_t size_bytes ;
32+ uint32_t bus_width ; /* 16, 32, 64 */
33+ uint32_t clock_mhz ;
34+ uint32_t cas_latency ;
35+ uint32_t ranks ;
36+ uint32_t banks ;
37+ bool ecc_enabled ;
38+ bool training_done ;
39+ } eos_dram_config_t ;
40+
41+ typedef struct {
42+ uint32_t read_delay ;
43+ uint32_t write_delay ;
44+ uint32_t dqs_delay ;
45+ uint32_t clk_delay ;
46+ bool valid ;
47+ } eos_dram_training_t ;
48+
49+ int eos_dram_init (eos_dram_config_t * cfg );
50+ int eos_dram_train (eos_dram_config_t * cfg , eos_dram_training_t * result );
51+ int eos_dram_test (const eos_dram_config_t * cfg );
52+ void eos_dram_dump (const eos_dram_config_t * cfg );
53+
54+ #ifdef __cplusplus
55+ }
56+ #endif
57+ #endif /* EOS_DRAM_H */
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