Direct import from FPGA bitstream #626
Description
Is your feature request related to a problem? Please describe.
I'd like to reverse-engineer a bitstream of a real-world device. As far as I understand, HAL can only import netlists in Verilog or VHDL format, hence a conversion step would be needed here. (It feels rather unwieldy, like having to convert a binary file back into LLVM IR before being able to import it into an SRE framework.)
Project IceStorm and Trellis provides the icestorm_vlog and ecp_vlog tools capable of doing this conversion, but Project Oxide (Nexus), Peppercorn (GateMate) and Apicula (Gowin) lack this capability. (Not to speak of more WIP projects like X-ray, Mistral, Combine, etc.)
Furthermore, using these bitstream-to-verilog conversion scripts is rather non-obvious, as one must be able to find them (they're rather hidden in the source tree of these projects).
Describe the solution you'd like
It would be nice if HAL could call into these projects/libraries and generate the Verilog netlist from a given bitstream automatically, either by using the Python scripts linked above, or with more manual work by calling the library code.
Describe alternatives you've considered
An alternative would be to have each 'backend' project have a "vlog tool" that generates the verilog netlitsts on its own. This file can then be manually imported into HAL.
Issues with integrating these libraries would be the range of programming languages they're written in (C++, Python and Rust) which would make interoperability more difficult, and the fact that these projects very often do not have proper release versioning at all (which makes them somewhat annoying to tie to a tool that does have such versioning, which in turn would e.g. make HAL unpackageable for many Linux distros).
Additional context
For reference, my current target is the Virtex-5 bitstream used in the IS-TWL-DEBUGGER, a debug/prorotype version of an 18-year-old Nintendo game console, for preservation reasons.
I am willing to contribute code for this project myself, though I would first like to know which approach would be best used here for that. (I am currently also doing a PhD student in hardware security at COSIC, KU Leuven, but am doing this work with the IS-TWL-DEBUGGER in my own spare time.)