[SystemRDL] Regwen declared after it's referenced in HJSON

[engdoreis]

There is a few cases where the register regwen is declared after it's reference by another register in the HJSON which is ilegal in System RDL.
The blocks affected are:

• ASCON: reg CTRL_AUX_REGWEN
• CSRNG: reg INT_STATE_READ_ENABLE_REGWEN

Possible solutions:

1. Change the order in the hjson
   • Advantage: Simple implementation
   • Disavantage: Would change the offsets of two registers, causing major version change.
2. Use dynamic assignement in RDL to reference the register only after it's declaration.
   • Advantage: The breaking change to opentitan
   • Disavantage: More complex implementation, the compiler may need to be changed.
3. Re-order the registers before exporting to RDL.
   • Advantage: Simple implementation
   • Disavantage: The RTL generated from RDL will be slightly different from reggen.