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DV4 - Continuous Verification Infrastructure #12

Description

@eniokaljic

Starting in parallel with RTL4 and SW4, and continuing beyond them, this task establishes a continuous verification and integration infrastructure that supports both simulation-based and hardware-backed validation.

This includes automated regression testing pipelines that execute DV1-DV3 test suites across a range of configurations, ensuring stability as the design scales and evolves. Continuous integration (CI) workflows are introduced to validate changes, enforce reproducibility, and maintain quality across contributions.

In addition to simulation, DV4 extends verification into real hardware environments, enabling testing on FPGA platforms and integration with FOSS toolchains for synthesis and place-and-route. This bridges the gap between functional verification and implementation validation, exposing issues related to timing, resource utilization, and system-level integration.

The outcome of DV4 is a long-running verification backbone that not only safeguards correctness during development but also supports the creation of robust, reproducible reference environments for adopters of the openENOC platform.

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