Commit cbda1ab
[Path B] Restore baseline 1-shim-per-compute-col placement
CI Triton 8x4 routing failure root cause: Path B's centroid-driven shim
placement put 6 shim tiles clustered at cols 0-5, leaving compute cols
6-7 with no nearby shim. mlir-aie's pathfinder then can't find a legal
route through the network. Baseline (pre-Xilinx#1605, pre-Path-B) deterministically
produced 8 shim cols (one per active compute col) via the same-column
heuristic, which routed cleanly.
Fix has three pieces; this commit lands the AIR side and bumps the
mlir-aie pin to pull in the third:
1. AIR (this commit): emit shim LTOs as `aie.logical_tile<ShimNOCTile>(
compute_col, ?)` whenever the device has a ShimNOC tile at that col.
On AIE1 (sparse ShimNOC at cols 2/6/10) the hint stays unset and the
placer falls back to centroid placement, preserving existing behavior.
2. AIR (this commit): scope LTO grouping to same-col candidates. Without
this, the first shim allocation creates an LTO and all subsequent
allocations reuse it regardless of compute col, so the per-col hint is
never honored. Now allocations only group onto an LTO whose col hint
matches their compute col.
3. mlir-aie #3064 (already merged at 45915e4): extend
`findTileWithCapacity` from sweep-right-only to bidirectional sweep.
Bumps utils/clone-mlir-aie.sh from b37dc33 to 45915e4 to pick this up.
Verified locally: Path B now produces bit-identical placement to
baseline trunk for the failing Triton 8x4 workload — 48 unique tiles,
8 shim cols at 0-7, 8 memtile cols at 0-7, 32 compute cores at rows
2-5. Lit suite: 370/372 pass (only 2 pre-existing AIRToROCDL failures
unrelated to Path B).
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>1 parent 899d66b commit cbda1ab
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