@@ -205,11 +205,55 @@ typedef struct {
205205
206206#define I2S_STREAM_CFG_DEFAULT () I2S_STREAM_CFG_DEFAULT_WITH_PARA(I2S_NUM_0, 44100, I2S_DATA_BIT_WIDTH_16BIT, AUDIO_STREAM_WRITER)
207207
208- #define I2S_STREAM_CFG_DEFAULT_WITH_PARA (port , rate , bits , stream_type ) { \
208+ #define I2S_STREAM_CFG_DEFAULT_WITH_PARA (port , rate , bits , stream_type ) I2S_STREAM_CFG_DEFAULT_WITH_TYLE_AND_CH(port, rate, bits, stream_type, I2S_SLOT_MODE_STEREO)
209+
210+ #if CONFIG_IDF_TARGET_ESP32
211+ #define I2S_STD_PHILIPS_SLOT_DEFAULT_ADF_CONFIG (bits_per_sample , mono_or_stereo ) { \
212+ .data_bit_width = bits_per_sample, \
213+ .slot_bit_width = I2S_SLOT_BIT_WIDTH_AUTO, \
214+ .slot_mode = mono_or_stereo, \
215+ .slot_mask = (mono_or_stereo == I2S_SLOT_MODE_MONO) ? \
216+ I2S_STD_SLOT_LEFT : I2S_STD_SLOT_BOTH, \
217+ .ws_width = bits_per_sample, \
218+ .ws_pol = false, \
219+ .bit_shift = true, \
220+ .msb_right = (bits_per_sample <= I2S_DATA_BIT_WIDTH_16BIT) ? \
221+ true : false, \
222+ }
223+ #elif CONFIG_IDF_TARGET_ESP32S2
224+ #define I2S_STD_PHILIPS_SLOT_DEFAULT_ADF_CONFIG (bits_per_sample , mono_or_stereo ) { \
225+ .data_bit_width = bits_per_sample, \
226+ .slot_bit_width = I2S_SLOT_BIT_WIDTH_AUTO, \
227+ .slot_mode = mono_or_stereo, \
228+ .slot_mask = (mono_or_stereo == I2S_SLOT_MODE_MONO) ? \
229+ I2S_STD_SLOT_LEFT : I2S_STD_SLOT_BOTH, \
230+ .ws_width = bits_per_sample, \
231+ .ws_pol = false, \
232+ .bit_shift = true, \
233+ .msb_right = true, \
234+ }
235+ #else
236+ #define I2S_STD_PHILIPS_SLOT_DEFAULT_ADF_CONFIG (bits_per_sample , mono_or_stereo ) { \
237+ .data_bit_width = bits_per_sample, \
238+ .slot_bit_width = I2S_SLOT_BIT_WIDTH_AUTO, \
239+ .slot_mode = mono_or_stereo, \
240+ .slot_mask = (mono_or_stereo == I2S_SLOT_MODE_MONO) ? \
241+ I2S_STD_SLOT_LEFT : I2S_STD_SLOT_BOTH, \
242+ .ws_width = bits_per_sample, \
243+ .ws_pol = false, \
244+ .bit_shift = true, \
245+ .left_align = true, \
246+ .big_endian = false, \
247+ .bit_order_lsb = false \
248+ }
249+ #endif
250+
251+
252+ #define I2S_STREAM_CFG_DEFAULT_WITH_TYLE_AND_CH (port , rate , bits , stream_type , channel ) { \
209253 .type = stream_type, \
210254 .std_cfg = { \
211255 .clk_cfg = I2S_STD_CLK_DEFAULT_CONFIG(rate), \
212- .slot_cfg = I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG (bits, I2S_SLOT_MODE_STEREO), \
256+ .slot_cfg = I2S_STD_PHILIPS_SLOT_DEFAULT_ADF_CONFIG (bits, channel), \
213257 .gpio_cfg = { \
214258 .invert_flags = { \
215259 .mclk_inv = false, \
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