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Merge branch 'bugfix/fix_voip_pop_voice' into 'master'
bugfix(example): Fixed voip example pop voice in mini board See merge request adf/esp-adf-internal!1436
2 parents 004f27b + 25799f5 commit bb35be3

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7 files changed

+123
-66
lines changed

7 files changed

+123
-66
lines changed

components/audio_hal/driver/es7210/es7210.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -600,6 +600,6 @@ void es7210_read_all(void)
600600
{
601601
for (int i = 0; i <= 0x4E; i++) {
602602
uint8_t reg = es7210_read_reg(i);
603-
ESP_LOGI(TAG, "REG:%02x, %02x", reg, i);
603+
ESP_LOGI(TAG, "REG:%02x, %02x", i, reg);
604604
}
605605
}

components/audio_hal/driver/es8311/es8311.c

Lines changed: 79 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -301,68 +301,15 @@ esp_err_t es8311_pa_power(bool enable)
301301
return ret;
302302
}
303303

304-
esp_err_t es8311_codec_init(audio_hal_codec_config_t *codec_cfg)
304+
esp_err_t es8311_config_sample(int sample_rate)
305305
{
306-
uint8_t datmp, regv;
307-
int coeff;
308306
esp_err_t ret = ESP_OK;
309-
i2c_init(); // ESP32 in master mode
310-
311-
/* Enhance ES8311 I2C noise immunity */
312-
ret |= es8311_write_reg(ES8311_GPIO_REG44, 0x08);
313-
/* Due to occasional failures during the first I2C write with the ES8311 chip, a second write is performed to ensure reliability */
314-
ret |= es8311_write_reg(ES8311_GPIO_REG44, 0x08);
315-
316-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x30);
317-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG02, 0x00);
318-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
319-
ret |= es8311_write_reg(ES8311_ADC_REG16, 0x24);
320-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
321-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
322-
ret |= es8311_write_reg(ES8311_SYSTEM_REG0B, 0x00);
323-
ret |= es8311_write_reg(ES8311_SYSTEM_REG0C, 0x00);
324-
ret |= es8311_write_reg(ES8311_SYSTEM_REG10, 0x1F);
325-
ret |= es8311_write_reg(ES8311_SYSTEM_REG11, 0x7F);
326-
ret |= es8311_write_reg(ES8311_RESET_REG00, 0x80);
327-
/* Set Codec into Master or Slave mode */
328-
regv = es8311_read_reg(ES8311_RESET_REG00);
329-
/* Set master/slave audio interface */
330-
audio_hal_codec_i2s_iface_t *i2s_cfg = &(codec_cfg->i2s_iface);
331-
switch (i2s_cfg->mode) {
332-
case AUDIO_HAL_MODE_MASTER: /* MASTER MODE */
333-
ESP_LOGI(TAG, "ES8311 in Master mode");
334-
regv |= 0x40;
335-
break;
336-
case AUDIO_HAL_MODE_SLAVE: /* SLAVE MODE */
337-
ESP_LOGI(TAG, "ES8311 in Slave mode");
338-
regv &= 0xBF;
339-
break;
340-
default:
341-
regv &= 0xBF;
342-
}
343-
ret |= es8311_write_reg(ES8311_RESET_REG00, regv);
344-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x3F);
345-
/* Select clock source for internal mclk */
346-
switch (get_es8311_mclk_src()) {
347-
case FROM_MCLK_PIN:
348-
regv = es8311_read_reg(ES8311_CLK_MANAGER_REG01);
349-
regv &= 0x7F;
350-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, regv);
351-
break;
352-
case FROM_SCLK_PIN:
353-
regv = es8311_read_reg(ES8311_CLK_MANAGER_REG01);
354-
regv |= 0x80;
355-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, regv);
356-
break;
357-
default:
358-
regv = es8311_read_reg(ES8311_CLK_MANAGER_REG01);
359-
regv &= 0x7F;
360-
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, regv);
361-
break;
362-
}
307+
uint8_t datmp, regv;
363308
int sample_fre = 0;
364309
int mclk_fre = 0;
365-
switch (i2s_cfg->samples) {
310+
int coeff;
311+
312+
switch (sample_rate) {
366313
case AUDIO_HAL_08K_SAMPLES:
367314
sample_fre = 8000;
368315
break;
@@ -391,6 +338,7 @@ esp_err_t es8311_codec_init(audio_hal_codec_config_t *codec_cfg)
391338
ESP_LOGE(TAG, "Unable to configure sample rate %dHz", sample_fre);
392339
break;
393340
}
341+
394342
mclk_fre = sample_fre * MCLK_DIV_FRE;
395343
coeff = get_coeff(mclk_fre, sample_fre);
396344
if (coeff < 0) {
@@ -421,7 +369,13 @@ esp_err_t es8311_codec_init(audio_hal_codec_config_t *codec_cfg)
421369

422370
if (get_es8311_mclk_src() == FROM_SCLK_PIN) {
423371
datmp = 3; /* DIG_MCLK = LRCK * 256 = BCLK * 8 */
372+
if (sample_fre == 8000) {
373+
/* When the sample rate is 8kHz, BCLK requires at least 512K (slot bit needs to be configured to 32bit).
374+
DIG_MCLK = LRCK * 256 = BCLK * 4 */
375+
datmp = 2;
376+
}
424377
}
378+
425379
regv |= (datmp) << 3;
426380
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG02, regv);
427381

@@ -456,6 +410,70 @@ esp_err_t es8311_codec_init(audio_hal_codec_config_t *codec_cfg)
456410
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG06, regv);
457411
}
458412

413+
return ESP_OK;
414+
}
415+
416+
esp_err_t es8311_codec_init(audio_hal_codec_config_t *codec_cfg)
417+
{
418+
uint8_t regv;
419+
esp_err_t ret = ESP_OK;
420+
i2c_init(); // ESP32 in master mode
421+
422+
/* Enhance ES8311 I2C noise immunity */
423+
ret |= es8311_write_reg(ES8311_GPIO_REG44, 0x08);
424+
/* Due to occasional failures during the first I2C write with the ES8311 chip, a second write is performed to ensure reliability */
425+
ret |= es8311_write_reg(ES8311_GPIO_REG44, 0x08);
426+
427+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x30);
428+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG02, 0x00);
429+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
430+
ret |= es8311_write_reg(ES8311_ADC_REG16, 0x24);
431+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
432+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
433+
ret |= es8311_write_reg(ES8311_SYSTEM_REG0B, 0x00);
434+
ret |= es8311_write_reg(ES8311_SYSTEM_REG0C, 0x00);
435+
ret |= es8311_write_reg(ES8311_SYSTEM_REG10, 0x1F);
436+
ret |= es8311_write_reg(ES8311_SYSTEM_REG11, 0x7F);
437+
ret |= es8311_write_reg(ES8311_RESET_REG00, 0x80);
438+
/* Set Codec into Master or Slave mode */
439+
regv = es8311_read_reg(ES8311_RESET_REG00);
440+
/* Set master/slave audio interface */
441+
audio_hal_codec_i2s_iface_t *i2s_cfg = &(codec_cfg->i2s_iface);
442+
switch (i2s_cfg->mode) {
443+
case AUDIO_HAL_MODE_MASTER: /* MASTER MODE */
444+
ESP_LOGI(TAG, "ES8311 in Master mode");
445+
regv |= 0x40;
446+
break;
447+
case AUDIO_HAL_MODE_SLAVE: /* SLAVE MODE */
448+
ESP_LOGI(TAG, "ES8311 in Slave mode");
449+
regv &= 0xBF;
450+
break;
451+
default:
452+
regv &= 0xBF;
453+
}
454+
ret |= es8311_write_reg(ES8311_RESET_REG00, regv);
455+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x3F);
456+
/* Select clock source for internal mclk */
457+
switch (get_es8311_mclk_src()) {
458+
case FROM_MCLK_PIN:
459+
regv = es8311_read_reg(ES8311_CLK_MANAGER_REG01);
460+
regv &= 0x7F;
461+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, regv);
462+
break;
463+
case FROM_SCLK_PIN:
464+
regv = es8311_read_reg(ES8311_CLK_MANAGER_REG01);
465+
regv |= 0x80;
466+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, regv);
467+
break;
468+
default:
469+
regv = es8311_read_reg(ES8311_CLK_MANAGER_REG01);
470+
regv &= 0x7F;
471+
ret |= es8311_write_reg(ES8311_CLK_MANAGER_REG01, regv);
472+
break;
473+
}
474+
475+
es8311_config_sample(i2s_cfg->samples);
476+
459477
/* mclk inverted or not */
460478
if (INVERT_MCLK) {
461479
regv = es8311_read_reg(ES8311_CLK_MANAGER_REG01);
@@ -577,7 +595,9 @@ esp_err_t es8311_set_bits_per_sample(audio_hal_iface_bits_t bits)
577595
esp_err_t es8311_codec_config_i2s(audio_hal_codec_mode_t mode, audio_hal_codec_i2s_iface_t *iface)
578596
{
579597
int ret = ESP_OK;
598+
ESP_LOGI(TAG, "CFG I2S: mode = %d, bits = %d, fmt = %d, samples = %d", mode, iface->bits, iface->fmt, iface->samples);
580599
ret |= es8311_set_bits_per_sample(iface->bits);
600+
ret |= es8311_config_sample(iface->samples);
581601
ret |= es8311_config_fmt(iface->fmt);
582602
return ret;
583603
}
@@ -750,6 +770,6 @@ void es8311_read_all()
750770
{
751771
for (int i = 0; i < 0x4A; i++) {
752772
uint8_t reg = es8311_read_reg(i);
753-
ESP_LOGI(TAG, "REG:%02x, %02x", reg, i);
773+
ESP_LOGI(TAG, "REG:%02x, %02x", i, reg);
754774
}
755775
}

components/esp_codec_dev/CHANGELOG.md

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,11 @@
11
# Changelog
22

3+
## Un-Release
4+
5+
### Bug Fixed
6+
7+
- Fixed the register configuration for es8311 when playing 8kHz audio without using MCLK.
8+
39
## v1.4.0
410

511
### Bug Fixed

components/esp_codec_dev/device/es8311/es8311.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -438,6 +438,11 @@ static int es8311_config_sample(audio_codec_es8311_t *codec, int sample_rate)
438438
}
439439
if (codec->cfg.use_mclk == false) {
440440
datmp = 3;
441+
if (sample_rate == 8000) {
442+
/* When the sample rate is 8kHz, BCLK requires at least 512K (slot bit needs to be configured to 32bit).
443+
DIG_MCLK = LRCK * 256 = BCLK * 4 */
444+
datmp = 2;
445+
}
441446
}
442447
regv |= (datmp) << 3;
443448
ret |= es8311_write_reg(codec, ES8311_CLK_MANAGER_REG02, regv);
Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
set(COMPONENT_SRCS "audio_tone_uri.c" "audio_player_int_tone.c")
22
set(COMPONENT_ADD_INCLUDEDIRS .)
33

4-
set(COMPONENT_REQUIRES esp-adf-libs audio_stream)
4+
set(COMPONENT_REQUIRES esp-adf-libs audio_stream audio_board audio_hal)
55

6-
register_component()
6+
register_component()

examples/protocols/components/audio_flash_tone/audio_player_int_tone.c

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,8 @@
3232
#include "i2s_stream.h"
3333
#include "algorithm_stream.h"
3434
#include "audio_player_int_tone.h"
35+
#include "audio_hal.h"
36+
#include "board_def.h"
3537

3638
static const char *TAG = "PLAYER_INT_TONE";
3739

@@ -51,7 +53,11 @@ static int i2s_write_cb(audio_element_handle_t el, char *buf, int len, TickType_
5153
size = len / 2;
5254
#endif
5355
#if CONFIG_IDF_TARGET_ESP32
54-
algorithm_mono_fix((uint8_t *)buf, size);
56+
audio_element_info_t info;
57+
audio_element_getinfo(el, &info);
58+
if (info.bits == I2S_DATA_BIT_WIDTH_16BIT) {
59+
algorithm_mono_fix((uint8_t *)buf, size);
60+
}
5561
#endif
5662
int ret = i2s_write_func(el, buf, size, wait_time, ctx);
5763
if (ret < 0) {
@@ -88,6 +94,9 @@ audio_err_t audio_player_int_tone_init(int sample_rate, int channel_format, int
8894
i2s_writer_cfg.expand_src_bits = 16;
8995
i2s_stream_set_channel_type(&i2s_writer_cfg, channel_format);
9096
i2s_writer = i2s_stream_init(&i2s_writer_cfg);
97+
if (ES8311_MCLK_SOURCE == 1 && sample_rate == 8000) {
98+
i2s_stream_set_clk(i2s_writer, sample_rate, I2S_DATA_BIT_WIDTH_32BIT, I2S_SLOT_MODE_MONO);
99+
}
91100
esp_audio_output_stream_add(player, i2s_writer);
92101
audio_element_set_write_cb(i2s_writer, i2s_write_cb, audio_element_get_write_cb(i2s_writer));
93102
audio_element_set_output_timeout(i2s_writer, portMAX_DELAY);

examples/protocols/components/av_stream/av_stream_hal/av_stream_hal_audio.c

Lines changed: 20 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,15 @@ static esp_err_t i2s_write_drv_init(int port, uint32_t sample_rate, i2s_channel_
8686
{
8787
i2s_stream_cfg_t i2s_cfg = I2S_STREAM_CFG_DEFAULT_WITH_PARA(port, sample_rate, I2S_DEFAULT_BITS, AUDIO_STREAM_WRITER);
8888
i2s_cfg.task_stack = -1;
89-
i2s_cfg.need_expand = (16 != I2S_DEFAULT_BITS);
89+
90+
if (ES8311_MCLK_SOURCE == 1 && sample_rate == 8000) { // For ES8311, when MCLK comes from BLCK, 8kHz audio requires 32-bit data width
91+
i2s_cfg.need_expand = true;
92+
i2s_cfg.std_cfg.slot_cfg.data_bit_width = I2S_DATA_BIT_WIDTH_32BIT;
93+
i2s_cfg.std_cfg.slot_cfg.slot_bit_width = I2S_DATA_BIT_WIDTH_32BIT;
94+
i2s_cfg.std_cfg.slot_cfg.ws_width = I2S_DATA_BIT_WIDTH_32BIT;
95+
} else {
96+
i2s_cfg.need_expand = (I2S_DEFAULT_BITS != I2S_DATA_BIT_WIDTH_16BIT);
97+
}
9098
i2s_stream_set_channel_type(&i2s_cfg, channels);
9199
i2s_io_writer = i2s_stream_init(&i2s_cfg);
92100
if (i2s_io_writer == NULL) {
@@ -109,6 +117,12 @@ static audio_board_handle_t i2s_device_init(uint32_t sample_rate)
109117
audio_board_handle_t board_handle = audio_board_init();
110118
audio_hal_ctrl_codec(board_handle->audio_hal, AUDIO_HAL_CODEC_MODE_BOTH, AUDIO_HAL_CTRL_START);
111119
audio_hal_set_volume(board_handle->audio_hal, 75);
120+
if(sample_rate == 8000) {
121+
ESP_LOGW(TAG, "i2s_device_init: sample_rate = %ld", sample_rate);
122+
audio_hal_codec_config_t audio_codec_cfg = AUDIO_CODEC_DEFAULT_CONFIG();
123+
audio_codec_cfg.i2s_iface.samples = AUDIO_HAL_08K_SAMPLES;
124+
audio_hal_codec_iface_config(board_handle->audio_hal, AUDIO_HAL_CODEC_MODE_BOTH, &audio_codec_cfg.i2s_iface);
125+
}
112126
return board_handle;
113127
}
114128

@@ -174,9 +188,12 @@ int av_stream_audio_write(char *buf, int len, TickType_t wait_time, bool uac_en)
174188
#endif
175189
} else {
176190
#if CONFIG_IDF_TARGET_ESP32
177-
algorithm_mono_fix((uint8_t *)buf, len);
191+
audio_element_info_t info;
192+
audio_element_getinfo(i2s_io_writer, &info);
193+
if (info.bits == I2S_DATA_BIT_WIDTH_16BIT) {
194+
algorithm_mono_fix((uint8_t *)buf, len);
195+
}
178196
#endif
179-
180197
int ret = audio_element_output(i2s_io_writer, buf, len);
181198
if (ret < 0) {
182199
ESP_LOGE(TAG, "i2s write failed");

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