Merge branch 'feature/c5_spi' into 'master'

feat: add C5 SPI support

See merge request application/esp-at!1933

Author: xcguang

.github/workflows/main.yml

@@ -156,6 +156,13 @@ jobs:
       artifacts_name: esp32c5-sdio-at
     secrets: inherit
 
+  build-esp32c5-spi-at:
+    uses: ./.github/workflows/build_template_esp32c5.yml
+    with:
+      module_name: ESP32C5-SPI
+      artifacts_name: esp32c5-spi-at
+    secrets: inherit
+
   build-esp32c2-4mb-g2-at:
     uses: ./.github/workflows/build_template_esp32c2.yml
     with:

.gitlab/ci/build_esp32c5.yml

@@ -23,6 +23,13 @@ esp32c5_at_wifi_function_test:
   variables:
     MODULE_NAME: "ESP32C5-4MB"
 
+esp32c5_spi_at:
+  extends:
+    - .build_template_esp32c5
+    - .rules:build:build_project
+  variables:
+    MODULE_NAME: "ESP32C5-SPI"
+
 esp32c5_sdio_at:
   extends:
     - .build_template_esp32c5

components/at/src/at_default_config.c

@@ -60,6 +60,7 @@ static const at_module_info_t s_module_info[] = {
 #if defined(CONFIG_IDF_TARGET_ESP32C5)
     {"ESP32C5-4MB",    CONFIG_ESP_AT_OTA_TOKEN_ESP32C5_4MB,         CONFIG_ESP_AT_OTA_SSL_TOKEN_ESP32C5_4MB},
     {"ESP32C5-SDIO",   NULL,  NULL},
+    {"ESP32C5-SPI",    NULL,  NULL },   // ESP32C5-SPI
 #endif
 
 #if defined(CONFIG_IDF_TARGET_ESP32C6)

components/customized_partitions/raw_data/factory_param/factory_param_data.csv

@@ -18,6 +18,7 @@ PLATFORM_ESP32C2,ESP32C2-2MB-BLE-G2,"2MB, BLE, No OTA, ECO4, TX:7 RX:6",4,78,1,1
 PLATFORM_ESP32C2,ESP32C2-2MB-NO-OTA-G2,"2MB, Wi-Fi + BLE, No OTA, ECO4, TX:7 RX:6",4,78,1,1,13,CN,115200,7,6,5,4,1
 PLATFORM_ESP32C5,ESP32C5-4MB,"4MB, Wi-Fi + BLE, OTA, TX:23 RX:24",4,78,1,1,13,CN,115200,23,24,25,26,1
 PLATFORM_ESP32C5,ESP32C5-SDIO,"4MB, Wi-Fi + BLE, OTA, communicate with MCU via SDIO",4,78,-1,1,13,CN,-1,-1,-1,-1,-1,1
+PLATFORM_ESP32C5,ESP32C5-SPI,"4MB, Wi-Fi + BLE, OTA, communicate with MCU via SPI",4,78,1,1,13,CN,-1,-1,-1,-1,-1,1
 PLATFORM_ESP32C6,ESP32C6-4MB,"4MB, Wi-Fi + BLE, OTA, TX:7 RX:6",4,78,1,1,13,CN,115200,7,6,5,4,1
 PLATFORM_ESP32C61,ESP32C61-4MB,"4MB, Wi-Fi + BLE, OTA, TX:7 RX:6",4,78,1,1,13,CN,115200,7,6,5,4,1
 PLATFORM_ESP32S2,MINI,"4MB, Wi-Fi, OTA, TX:17 RX:21",4,78,1,1,13,CN,115200,17,21,20,19,1

docs/en/Compile_and_Develop/How_to_implement_SPI_AT.rst

@@ -85,6 +85,31 @@ The following pin assignments are used by default:
     * - QUADHD (qio/qout) :sup:`1`
       - 2
 
+.. only:: esp32c5
+
+  .. list-table:: The Default Pins for SPI AT
+    :widths: 10 25
+    :header-rows: 1
+
+    * - Signal
+      - GPIO Number
+    * - SCLK
+      - 6
+    * - MISO
+      - 2
+    * - MOSI
+      - 7
+    * - CS
+      - 10
+    * - HANDSHAKE
+      - 3
+    * - GND
+      - GND
+    * - QUADWP (qio/qout) :sup:`1`
+      - 5
+    * - QUADHD (qio/qout) :sup:`1`
+      - 4
+
 **Note** 1: QUADWP and QUADHD signals are only used for 4-bit (qio/qout) transactions.
 
 You can change the default pin assignments by ``./build.py menuconfig`` > ``Component config`` > ``AT`` > ``communicate method for AT command`` > ``AT through SPI`` > ``AT SPI GPIO settings`` and compile the project (see :doc:`../Compile_and_Develop/How_to_clone_project_and_compile_it`).
@@ -302,51 +327,72 @@ Reference Results
 
 The table below shows the throughput results we got in a shield box.
 
-.. list-table:: SPI AT Wi-Fi TCP Throughput
-   :header-rows: 1
-   :widths: 15 20 25 25
-
-   * - Clock
-     - SPI mode
-     - master->slave
-     - slave->master
-   * - 10 M
-     - Standard
-     - 0.95 MByte/s
-     - 1.00 MByte/s
-   * - 10 M
-     - Dual
-     - 1.37 MByte/s
-     - 1.29 MByte/s
-   * - 10 M
-     - Quad
-     - 1.43 MByte/s
-     - 1.31 MByte/s
-   * - 20 M
-     - Standard
-     - 1.41 MByte/s
-     - 1.30 MByte/s
-   * - 20 M
-     - Dual
-     - 1.39 MByte/s
-     - 1.30 MByte/s
-   * - 20 M
-     - Quad
-     - 1.39 MByte/s
-     - 1.30 MByte/s
-   * - 40 M
-     - Standard
-     - 1.37 MByte/s
-     - 1.30 MByte/s
-   * - 40 M
-     - Dual
-     - 1.40 MByte/s
-     - 1.31 MByte/s
-   * - 40 M
-     - Quad
-     - 1.48 MByte/s
-     - 1.31 MByte/s
-
-**Note** 1: When SPI clock frequency is high, due to the limitation of upper network components, the communication rate of Dual or Quad mode is not significantly improved compared with Standard mode.
-
-**Note** 2: For more information about SPI communication, please refer to the `Technical Reference Manuals <https://www.espressif.com/en/support/documents/technical-documents>`_.
+.. only:: esp32c6 or esp32c3
+
+  .. list-table:: SPI AT Wi-Fi TCP Throughput
+    :header-rows: 1
+    :widths: 15 20 25 25
+
+    * - Clock
+      - SPI mode
+      - master->slave
+      - slave->master
+    * - 10 M
+      - Standard
+      - 0.95 MByte/s
+      - 1.00 MByte/s
+    * - 10 M
+      - Dual
+      - 1.37 MByte/s
+      - 1.29 MByte/s
+    * - 10 M
+      - Quad
+      - 1.43 MByte/s
+      - 1.31 MByte/s
+    * - 20 M
+      - Standard
+      - 1.41 MByte/s
+      - 1.30 MByte/s
+    * - 20 M
+      - Dual
+      - 1.39 MByte/s
+      - 1.30 MByte/s
+    * - 20 M
+      - Quad
+      - 1.39 MByte/s
+      - 1.30 MByte/s
+    * - 40 M
+      - Standard
+      - 1.37 MByte/s
+      - 1.30 MByte/s
+    * - 40 M
+      - Dual
+      - 1.40 MByte/s
+      - 1.31 MByte/s
+    * - 40 M
+      - Quad
+      - 1.48 MByte/s
+      - 1.31 MByte/s
+
+  **Note** : When SPI clock frequency is high, due to the limitation of upper network components, the communication rate of Dual or Quad mode is not significantly improved compared with Standard mode.
+
+.. only:: esp32c5
+
+  .. list-table:: SPI AT Wi-Fi 5G TCP Throughput
+    :header-rows: 1
+    :widths: 15 20 25 25
+
+    * - Clock
+      - SPI mode
+      - master->slave
+      - slave->master
+    * - 26 M
+      - Standard
+      - 2.15 MByte/s
+      - 2.25 MByte/s
+    * - 26 M
+      - Dual
+      - 2.97 MByte/s
+      - 2.59 MByte/s
+
+**Note** : For more information about SPI communication, please refer to the `Technical Reference Manuals <https://www.espressif.com/en/support/documents/technical-documents>`_.

docs/zh_CN/Compile_and_Develop/How_to_implement_SPI_AT.rst

@@ -85,6 +85,31 @@ SPI AT 默认管脚
     * - QUADHD (qio/qout) :sup:`1`
       - 2
 
+.. only:: esp32c5
+
+  .. list-table:: SPI AT 默认管脚
+    :widths: 10 25
+    :header-rows: 1
+
+    * - 信号
+      - GPIO 编号
+    * - SCLK
+      - 6
+    * - MISO
+      - 2
+    * - MOSI
+      - 7
+    * - CS
+      - 10
+    * - HANDSHAKE
+      - 3
+    * - GND
+      - GND
+    * - QUADWP (qio/qout) :sup:`1`
+      - 5
+    * - QUADHD (qio/qout) :sup:`1`
+      - 4
+
 **说明** 1：QUADWP 引脚和 QUADHD 引脚仅在使用 4 线 SPI 工作时使用。
 
 您可以通过 ``./build.py menuconfig`` > ``Component config`` > ``AT`` > ``communicate method for AT command`` > ``AT through SPI`` > ``AT SPI GPIO settings``，然后编译工程来配置 SPI AT 对应的管脚（参考 :doc:`../Compile_and_Develop/How_to_clone_project_and_compile_it`）。
@@ -302,51 +327,73 @@ SPI AT 速率
 
 下表显示了我们在屏蔽箱中得到的通信速率结果：
 
-.. list-table:: SPI AT Wi-Fi TCP 通信速率
-   :header-rows: 1
-   :widths: 15 20 25 25
-
-   * - Clock
-     - SPI mode
-     - master->slave
-     - slave->master
-   * - 10 M
-     - Standard
-     - 0.95 MByte/s
-     - 1.00 MByte/s
-   * - 10 M
-     - Dual
-     - 1.37 MByte/s
-     - 1.29 MByte/s
-   * - 10 M
-     - Quad
-     - 1.43 MByte/s
-     - 1.31 MByte/s
-   * - 20 M
-     - Standard
-     - 1.41 MByte/s
-     - 1.30 MByte/s
-   * - 20 M
-     - Dual
-     - 1.39 MByte/s
-     - 1.30 MByte/s
-   * - 20 M
-     - Quad
-     - 1.39 MByte/s
-     - 1.30 MByte/s
-   * - 40 M
-     - Standard
-     - 1.37 MByte/s
-     - 1.30 MByte/s
-   * - 40 M
-     - Dual
-     - 1.40 MByte/s
-     - 1.31 MByte/s
-   * - 40 M
-     - Quad
-     - 1.48 MByte/s
-     - 1.31 MByte/s
-
-**说明** 1：当 SPI 的时钟频率较高时，受限于上层网络组件的限制，使用 Dual 或者 Quad 工作模式的通信速率想比较于 Standard 模式并未显著改善。
-
-**说明** 2：更多关于 SPI 通信的介绍请参考对应模组的 `技术参考手册 <https://www.espressif.com/zh-hans/support/documents/technical-documents>`_。
+.. only:: esp32c6 or esp32c3
+
+  .. list-table:: SPI AT Wi-Fi TCP 通信速率
+    :header-rows: 1
+    :widths: 15 20 25 25
+
+    * - Clock
+      - SPI mode
+      - master->slave
+      - slave->master
+    * - 10 M
+      - Standard
+      - 0.95 MByte/s
+      - 1.00 MByte/s
+    * - 10 M
+      - Dual
+      - 1.37 MByte/s
+      - 1.29 MByte/s
+    * - 10 M
+      - Quad
+      - 1.43 MByte/s
+      - 1.31 MByte/s
+    * - 20 M
+      - Standard
+      - 1.41 MByte/s
+      - 1.30 MByte/s
+    * - 20 M
+      - Dual
+      - 1.39 MByte/s
+      - 1.30 MByte/s
+    * - 20 M
+      - Quad
+      - 1.39 MByte/s
+      - 1.30 MByte/s
+    * - 40 M
+      - Standard
+      - 1.37 MByte/s
+      - 1.30 MByte/s
+    * - 40 M
+      - Dual
+      - 1.40 MByte/s
+      - 1.31 MByte/s
+    * - 40 M
+      - Quad
+      - 1.48 MByte/s
+      - 1.31 MByte/s
+
+  **说明** ：当 SPI 的时钟频率较高时，受限于上层网络组件的限制，使用 Dual 或者 Quad 工作模式的通信速率想比较于 Standard 模式并未显著改善。
+
+.. only:: esp32c5
+
+  .. list-table:: SPI AT Wi-Fi 5G TCP 通信速率
+    :header-rows: 1
+    :widths: 15 20 25 25
+
+    * - Clock
+      - SPI mode
+      - master->slave
+      - slave->master
+    * - 26 M
+      - Standard
+      - 2.15 MByte/s
+      - 2.25 MByte/s
+    * - 26 M
+      - Dual
+      - 2.97 MByte/s
+      - 2.59 MByte/s
+
+
+**说明** ：更多关于 SPI 通信的介绍请参考对应模组的 `技术参考手册 <https://www.espressif.com/zh-hans/support/documents/technical-documents>`_。