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lines changed Original file line number Diff line number Diff line change @@ -584,6 +584,15 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle)
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#if SOC_SPI_SUPPORT_CLK_RC_FAST
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if (handle -> cfg .clock_source == SPI_CLK_SRC_RC_FAST ) {
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+ // If no transactions from other device, acquire the bus to switch module clock to `SPI_CLK_SRC_DEFAULT`
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+ // because `SPI_CLK_SRC_RC_FAST` will be disabled then, which block following transactions
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+ if (handle -> host -> cur_cs == DEV_NUM_MAX ) {
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+ spi_device_acquire_bus (handle , portMAX_DELAY );
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+ SPI_MASTER_PERI_CLOCK_ATOMIC () {
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+ spi_ll_set_clk_source (handle -> host -> hal .hw , SPI_CLK_SRC_DEFAULT );
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+ }
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+ spi_device_release_bus (handle );
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+ }
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periph_rtc_dig_clk8m_disable ();
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}
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#endif
Original file line number Diff line number Diff line change @@ -355,7 +355,7 @@ typedef enum { // TODO: [ESP32C5] IDF-8695 (inherit from C6)
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/**
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* @brief Array initializer for all supported clock sources of SPI
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*/
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- #define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST }
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+ #define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_XTAL }
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/**
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* @brief Type of SPI clock source.
Original file line number Diff line number Diff line change @@ -357,7 +357,7 @@ typedef enum {
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/**
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* @brief Array initializer for all supported clock sources of SPI
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*/
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- #define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST }
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+ #define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_XTAL }
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/**
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* @brief Type of SPI clock source.
Original file line number Diff line number Diff line change @@ -249,7 +249,7 @@ typedef enum {
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/**
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* @brief Array initializer for all supported clock sources of SPI
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*/
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- #define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST }
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+ #define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_XTAL }
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/**
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* @brief Type of SPI clock source.
Original file line number Diff line number Diff line change @@ -335,7 +335,7 @@ typedef enum {
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/**
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* @brief Array initializer for all supported clock sources of SPI
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*/
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- #define SOC_SPI_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_PLL_F48M, SOC_MOD_CLK_RC_FAST }
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+ #define SOC_SPI_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_PLL_F48M }
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/**
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* @brief Type of SPI clock source.
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