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2 parents 75cb5ad + da79b19 commit d3ffbccCopy full SHA for d3ffbcc
components/ulp/test_apps/ulp_fsm/main/test_ulp.c
@@ -362,7 +362,7 @@ TEST_CASE("ULP FSM I_WR_REG instruction test", "[ulp]")
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TEST_ESP_OK(ulp_run(0));
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/* Wait for the ULP co-processor to finish up */
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- vTaskDelay(10 / portTICK_PERIOD_MS);
+ vTaskDelay(50 / portTICK_PERIOD_MS);
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/* Verify the test results */
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uint32_t clear = REG_READ(RTC_CNTL_STORE0_REG);
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