Skip to content

Commit e7088bb

Browse files
committed
Merge branch 'feat/add_uart_support_on_h21' into 'master'
feat(uart): support uart on esp32h21 Closes IDF-11618, IDF-11620, and IDF-12143 See merge request espressif/esp-idf!37197
2 parents d17b0ed + 028a16c commit e7088bb

File tree

12 files changed

+223
-87
lines changed

12 files changed

+223
-87
lines changed

components/esp_driver_uart/test_apps/.build-test-rules.yml

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,6 @@
33
components/esp_driver_uart/test_apps/rs485:
44
disable:
55
- if: SOC_UART_SUPPORTED != 1
6-
- if: IDF_TARGET in ["esp32h21"]
7-
temporary: true
8-
reason: not support yet # TODO: [esp32h21] IDF-11618
96
disable_test:
107
- if: IDF_TARGET != "esp32"
118
temporary: true
@@ -17,9 +14,6 @@ components/esp_driver_uart/test_apps/rs485:
1714
components/esp_driver_uart/test_apps/uart:
1815
disable:
1916
- if: SOC_UART_SUPPORTED != 1
20-
- if: IDF_TARGET in ["esp32h21"]
21-
temporary: true
22-
reason: not support yet # TODO: [esp32h21] IDF-11618
2317
depends_components:
2418
- esp_driver_uart
2519
- esp_driver_gpio
Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
2-
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
1+
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
2+
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |
Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
2-
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
1+
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
2+
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |

components/esp_rom/esp32h21/include/esp32h21/rom/uart.h

Lines changed: 114 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -16,8 +16,6 @@
1616
extern "C" {
1717
#endif
1818

19-
//TODO: [ESP32H21] IDF-11618
20-
2119
/** \defgroup uart_apis, uart configuration and communication related apis
2220
* @brief uart apis
2321
*/
@@ -26,34 +24,38 @@ extern "C" {
2624
* @{
2725
*/
2826

27+
/*It is found that when the buf is only 0x400, and the baud rate is set to 921600, the download is likely to fail */
28+
#define RX_BUFF_SIZE 0x800
29+
#define TX_BUFF_SIZE 100
30+
2931
//uart int enable register ctrl bits
30-
#define UART_RCV_INTEN BIT0
31-
#define UART_TRX_INTEN BIT1
32-
#define UART_LINE_STATUS_INTEN BIT2
32+
#define UART_RCV_INTEN BIT0
33+
#define UART_TRX_INTEN BIT1
34+
#define UART_LINE_STATUS_INTEN BIT2
3335

3436
//uart int identification ctrl bits
35-
#define UART_INT_FLAG_MASK 0x0E
37+
#define UART_INT_FLAG_MASK 0x0E
3638

3739
//uart fifo ctrl bits
38-
#define UART_CLR_RCV_FIFO BIT1
39-
#define UART_CLR_TRX_FIFO BIT2
40-
#define UART_RCVFIFO_TRG_LVL_BITS BIT6
40+
#define UART_CLR_RCV_FIFO BIT1
41+
#define UART_CLR_TRX_FIFO BIT2
42+
#define UART_RCVFIFO_TRG_LVL_BITS BIT6
4143

4244
//uart line control bits
43-
#define UART_DIV_LATCH_ACCESS_BIT BIT7
45+
#define UART_DIV_LATCH_ACCESS_BIT BIT7
4446

4547
//uart line status bits
46-
#define UART_RCV_DATA_RDY_FLAG BIT0
47-
#define UART_RCV_OVER_FLOW_FLAG BIT1
48-
#define UART_RCV_PARITY_ERR_FLAG BIT2
49-
#define UART_RCV_FRAME_ERR_FLAG BIT3
50-
#define UART_BRK_INT_FLAG BIT4
51-
#define UART_TRX_FIFO_EMPTY_FLAG BIT5
52-
#define UART_TRX_ALL_EMPTY_FLAG BIT6 // include fifo and shift reg
53-
#define UART_RCV_ERR_FLAG BIT7
48+
#define UART_RCV_DATA_RDY_FLAG BIT0
49+
#define UART_RCV_OVER_FLOW_FLAG BIT1
50+
#define UART_RCV_PARITY_ERR_FLAG BIT2
51+
#define UART_RCV_FRAME_ERR_FLAG BIT3
52+
#define UART_BRK_INT_FLAG BIT4
53+
#define UART_TRX_FIFO_EMPTY_FLAG BIT5
54+
#define UART_TRX_ALL_EMPTY_FLAG BIT6 // include fifo and shift reg
55+
#define UART_RCV_ERR_FLAG BIT7
5456

5557
//send and receive message frame head
56-
#define FRAME_FLAG 0x7E
58+
#define FRAME_FLAG 0x7E
5759

5860
typedef enum {
5961
UART_LINE_STATUS_INT_FLAG = 0x06,
@@ -86,7 +88,6 @@ typedef enum {
8688
NONE_BITS = 0,
8789
ODD_BITS = 2,
8890
EVEN_BITS = 3
89-
9091
} UartParityMode;
9192

9293
typedef enum {
@@ -139,7 +140,7 @@ typedef enum {
139140
} RcvMsgState;
140141

141142
typedef struct {
142-
UartBautRate baut_rate;
143+
UartBautRate baud_rate;
143144
UartBitsNum4Char data_bits;
144145
UartExistParity exist_parity;
145146
UartParityMode parity; // chip size in byte
@@ -168,11 +169,9 @@ void uartAttach(void *rxBuffer);
168169
*
169170
* @param uint8_t uart_no : 0 for UART0, else for UART1.
170171
*
171-
* @param uint32_t clock : clock used by uart module, to adjust baudrate.
172-
*
173172
* @return None
174173
*/
175-
void Uart_Init(uint8_t uart_no, uint32_t clock);
174+
void Uart_Init(uint8_t uart_no);
176175

177176
/**
178177
* @brief Modify uart baudrate.
@@ -186,6 +185,19 @@ void Uart_Init(uint8_t uart_no, uint32_t clock);
186185
*/
187186
void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
188187

188+
/**
189+
* @brief Init uart0 or uart1 for UART download booting mode.
190+
* Please do not call this function in SDK.
191+
*
192+
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
193+
*
194+
* @param uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
195+
* 1, two UART modules, hard to detect, detect and return.
196+
*
197+
* @return None
198+
*/
199+
int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
200+
189201
/**
190202
* @brief Switch printf channel of uart_tx_one_char.
191203
* Please do not call this function when printf.
@@ -196,14 +208,24 @@ void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
196208
*/
197209
void uart_tx_switch(uint8_t uart_no);
198210

211+
/**
212+
* @brief Switch message exchange channel for UART download booting.
213+
* Please do not call this function in SDK.
214+
*
215+
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
216+
*
217+
* @return None
218+
*/
219+
void uart_buff_switch(uint8_t uart_no);
220+
199221
/**
200222
* @brief Output a char to printf channel, wait until fifo not full.
201223
*
202224
* @param None
203225
*
204226
* @return OK.
205227
*/
206-
ETS_STATUS uart_tx_one_char(uint8_t TxChar);
228+
ETS_STATUS uart_tx_one_char(uint8_t txchar);
207229

208230
/**
209231
* @brief Output a char to message exchange channel, wait until fifo not full.
@@ -213,7 +235,17 @@ ETS_STATUS uart_tx_one_char(uint8_t TxChar);
213235
*
214236
* @return OK.
215237
*/
216-
ETS_STATUS uart_tx_one_char2(uint8_t TxChar);
238+
ETS_STATUS uart_tx_one_char2(uint8_t txchar);
239+
240+
/**
241+
* @brief Output a char to usb-serial channel, wait until fifo not full.
242+
* Please do not call this function in SDK.
243+
*
244+
* @param None
245+
*
246+
* @return OK.
247+
*/
248+
ETS_STATUS uart_tx_one_char3(uint8_t txchar);
217249

218250
/**
219251
* @brief Wait until uart tx full empty.
@@ -288,7 +320,7 @@ void uart_rx_intr_handler(void *para);
288320
* @return OK for successful.
289321
* FAIL for failed.
290322
*/
291-
ETS_STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
323+
ETS_STATUS uart_rx_readbuff(RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
292324

293325
/**
294326
* @brief Get all chars from receive buffer.
@@ -338,6 +370,60 @@ void send_packet(uint8_t *p, int len);
338370
*/
339371
int recv_packet(uint8_t *p, int len, uint8_t is_sync);
340372

373+
/**
374+
* @brief Send an packet to download tool, with SLIP escaping.
375+
* Please do not call this function in SDK.
376+
*
377+
* @param uint8_t *pData : the pointer to input string.
378+
*
379+
* @param uint16_t DataLen : the string length.
380+
*
381+
* @return OK for successful.
382+
* FAIL for failed.
383+
*/
384+
ETS_STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
385+
386+
/**
387+
* @brief Receive an packet from download tool, with SLIP escaping.
388+
* Please do not call this function in SDK.
389+
*
390+
* @param uint8_t *pData : the pointer to input string.
391+
*
392+
* @param uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
393+
*
394+
* @param uint8_t is_sync : 0, only one UART module;
395+
* 1, two UART modules.
396+
*
397+
* @return OK for successful.
398+
* FAIL for failed.
399+
*/
400+
ETS_STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
401+
402+
/**
403+
* @brief Check if this UART is in download connection.
404+
* Please do not call this function in SDK.
405+
*
406+
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
407+
*
408+
* @return ETS_NO_BOOT = 0 for no.
409+
* SEL_UART_BOOT = BIT(1) for yes.
410+
*/
411+
uint8_t UartConnCheck(uint8_t uart_no);
412+
413+
/**
414+
* @brief Initialize the USB ACM UART
415+
* Needs to be fed a buffer of at least 128 bytes, plus any rx buffer you may want to have.
416+
*
417+
* @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
418+
* @param cdc_acm_work_mem_len Length of work mem
419+
*/
420+
void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
421+
422+
/**
423+
* @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
424+
*/
425+
void usb_serial_otg_enable_reset_on_rts(void);
426+
341427
extern UartDevice UartDev;
342428

343429
/**

0 commit comments

Comments
 (0)