scl_wait_us maximum is unchecked, will trigger odd behavior if set to >13.1ms on ESP32 (IDFGH-16859)

[therealergo]

Answers checklist.

• I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
• I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
• I have searched the issue tracker for a similar issue and not found a similar issue.

General issue report

This is with ESP-IDF 5.5.1, using the new I2C driver.

• When i2c_master_bus_add_device(...) is called, it sets the scl_wait_us field in i2c_master_dev_t using the value from the input i2c_device_config_t struct, without performing any checks.
• When s_i2c_transaction_start(...) is later called, i2c_hal_master_set_scl_timeout_val(...) is then called with the value from scl_wait_us without any checks.
• i2c_hal_master_set_scl_timeout_val(...) then calls i2c_ll_calculate_timeout_us_to_reg_val(...) and i2c_ll_set_tout(...) without any checks.
• i2c_ll_calculate_timeout_us_to_reg_val(...) computes a number of APB clock cycles, returning a 32-bit integer.
• i2c_ll_set_tout(...) then takes that 32-bit integer, and writes it to a 20-bit register tout for the I2C device. If the result overflows that field, it will be truncated and an incorrect smaller value will be used instead.

This limitation is not mentioned in any documentation around that field, so it could lead to confusion or selection of an unexpected timeout value.

[ginkgm]

Hi @therealergo

Thanks for your reporting! We will fix this issue