RTC GPIO Pin Flicker Causing Power-On Reset with DFS and Auto Light Sleep Enabled (IDFGH-16966)

[michaelboeding]

Answers checklist.

• I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
• I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
• I have searched the issue tracker for a similar issue and not found a similar issue.

General issue report

RTC GPIO Pin Flicker Causing Power-On Reset with DFS and Auto Light Sleep Enabled

Environment:

• ESP-IDF Version: v5.3.3
• SoC: ESP32-S3
• Power Management: DFS and auto light sleep enabled

Problem Description:

I'm experiencing intermittent flickering on an RTC GPIO pin (PIN_HOLD_PWR_ON) that is used to keep the board powered by controlling an external power switch/FET. This flicker is causing random power-on resets (POR) during runtime, not brownouts.

The pin is configured as an RTC GPIO with hold enabled to maintain its HIGH state across sleep modes and keep the board powered. Despite extensive configuration including RTC hold, sleep GPIO settings, and RTC peripheral domain power retention, the pin appears to glitch momentarily during operation.

Suspected Cause:

The issue may be related to interactions between:

• Dynamic Frequency Scaling (DFS)
• Auto light sleep mode
• RTC GPIO hold functionality

Expected Behavior:

The PIN_HOLD_PWR_ON RTC GPIO should maintain a stable HIGH level continuously during runtime to keep the power switch latched, preventing any power interruptions.

Actual Behavior:

The RTC GPIO pin experiences brief glitches/flickers that cause the external power switch to toggle, resulting in a power-on reset of the device. These resets occur randomly during normal operation.

Code Sample:

// Method used to power on (and keep holding) the board using RTC IO
void holdPowerOn() {
    ESP_LOGI(TAG, "Configuring RTC hold pin to keep board powered");
    
    // Keep RTC peripheral domain powered across sleep to preserve RTC IO state
    esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);
    
    // --- 1) Configure PIN_HOLD_PWR_ON as RTC IO output ---
    // Route pad to RTC domain and init it
    rtc_gpio_init(PIN_HOLD_PWR_ON);
    
    // Make sure no internal pulls fight your external FET gate
    rtc_gpio_pullup_dis(PIN_HOLD_PWR_ON);
    rtc_gpio_pulldown_dis(PIN_HOLD_PWR_ON);
    
    // Set as RTC output-only
    rtc_gpio_set_direction(PIN_HOLD_PWR_ON, RTC_GPIO_MODE_OUTPUT_ONLY);
    
    // Explicitly opt this pad out of light-sleep GPIO reconfiguration
    // (belt-and-suspenders; RTC hold should already retain it)
    // This prevents the sleep controller from momentarily tri-stating the pad
    // during light sleep entry/exit.
    // Note: we may not need this later since its rtc hold 
    gpio_sleep_sel_dis(PIN_HOLD_PWR_ON);
    gpio_sleep_set_direction(PIN_HOLD_PWR_ON, GPIO_MODE_OUTPUT);
    gpio_sleep_set_pull_mode(PIN_HOLD_PWR_ON, GPIO_FLOATING);
    
    // Drive it HIGH to latch the power FET / load switch
    rtc_gpio_set_level(PIN_HOLD_PWR_ON, 1);
    
    // --- 2) Enable RTC hold so this state survives deep sleep / resets ---
    // Latch this pad at its current level (HIGH)
    rtc_gpio_hold_en(PIN_HOLD_PWR_ON);
    
    // Optional but harmless: keep deep-sleep hold enabled globally.
    // (If you also use gpio_hold_en() on other pins, this keeps them too.)
    gpio_deep_sleep_hold_en();
}

Questions:

1. Are there known interactions between DFS frequency transitions and RTC GPIO hold functionality that could cause brief glitches?
2. Could auto light sleep entry/exit cause momentary changes to RTC GPIO states even with hold enabled?
3. Are there additional configuration steps needed to ensure RTC GPIO stability with power management features enabled?
4. Should certain power management features be disabled for critical power control pins?