@@ -35,6 +35,7 @@ typedef struct {
3535
3636#define ESP8266_SPI_REG_BASE 0x60000200
3737#define ESP32S2_SPI_REG_BASE 0x3f402000
38+ #define ESP32H2_SPI_REG_BASE 0x60003000
3839#define ESP32C6_SPI_REG_BASE 0x60003000
3940#define ESP32xx_SPI_REG_BASE 0x60002000
4041#define ESP32_SPI_REG_BASE 0x3ff42000
@@ -169,17 +170,17 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
169170 // ESP32H2
170171 {
171172 .regs = {
172- .cmd = ESP32xx_SPI_REG_BASE + 0x00 ,
173- .usr = ESP32xx_SPI_REG_BASE + 0x18 ,
174- .usr1 = ESP32xx_SPI_REG_BASE + 0x1c ,
175- .usr2 = ESP32xx_SPI_REG_BASE + 0x20 ,
176- .w0 = ESP32xx_SPI_REG_BASE + 0x58 ,
177- .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24 ,
178- .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28 ,
173+ .cmd = ESP32H2_SPI_REG_BASE + 0x00 ,
174+ .usr = ESP32H2_SPI_REG_BASE + 0x18 ,
175+ .usr1 = ESP32H2_SPI_REG_BASE + 0x1c ,
176+ .usr2 = ESP32H2_SPI_REG_BASE + 0x20 ,
177+ .w0 = ESP32H2_SPI_REG_BASE + 0x58 ,
178+ .mosi_dlen = ESP32H2_SPI_REG_BASE + 0x24 ,
179+ .miso_dlen = ESP32H2_SPI_REG_BASE + 0x28 ,
179180 },
180- .efuse_base = 0x6001A000 ,
181+ .efuse_base = 0x600B0800 ,
181182 .chip_magic_value = { 0xd7b73e80 , 0 , 0 , 0 },
182- .read_spi_config = spi_config_esp32xx ,
183+ .read_spi_config = spi_config_unsupported ,
183184 .mac_efuse_offset = 0x44 ,
184185 .encryption_in_begin_flash_cmd = true,
185186 .chip_id = 16 ,
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