CoreS3 does not power 5V line in PORT.C (TZ-1864)

[txinto]

Checklist

• Checked the issue tracker for similar issues to ensure this is not a duplicate
• Read the documentation to confirm the issue is not addressed there and your configuration is set correctly
• Tested with the latest version to ensure the issue hasn't been fixed

How often does this bug occurs?

always

Expected behavior

I expect to be able to use an H2 Unit in the PORT.C. I configure it, but the firmware does not provide 5V to the PORT.C 5V pin, so H2 unit is not powered and CoreS3 is rebooting constantly.

If I flash another firmware before which does it, and then I keep the unit alive and reflash the BR firmware, then it works. But it will be working well only until the next power cycle.

Actual behavior (suspected bug)

It should work always ok, and survive power cycle.

Obviously, it would be great if you provide a Kconfig entry to select between a H2 module and a H2 unit, which should deactivate the RCP update feature and remap TX/RX pins to 17/18.

Error logs or terminal output

Steps to reproduce the behavior

I can make it fail by simply flashing the m5stack border router firmware, even if I set the correct pins for the RCP communication and disable the RCP feature.

I can make it work ok using these steps (ephemeraly, because the system will become useless on next power cycle):

• First I flash UIFlow2 (or other firmware which correctly activates the 5V line in the PORT.C).
• then I reflash the border router firmware, which will not deconfigure the i2c peripheral which controls the 5V line.

If I do not do it this way, current firmware does not provide power to H2 unit, and then the CoreS3 is always rebooting because it thinks there is no H2 unit on it.

Project release version

master

System architecture

Intel/AMD 64-bit (modern PC, older Mac)

Operating system

Linux

Operating system version

Ubuntu 22.04

Shell

Bash

Additional context

I assume you have developed the CoreS3 port using this module:
https://docs.m5stack.com/en/module/Module%20Gateway%20H2

I am trying with this one:
https://docs.m5stack.com/en/unit/Unit%20Gateway%20H2

Thanks for your fantastic job.

BR.

[gytxxsy]

This appears to be a practical application issue. Our BR example currently only supports the Module Gateway H2 and does not include adaptation for PORT.C. You can consult M5Stack and modify the example yourself to work with PORT.C.

[gytxxsy]

This appears to be a practical application issue. Our BR example currently only supports the Module Gateway H2 and does not include adaptation for PORT.C. You can consult M5Stack and modify the example yourself to work with PORT.C.

We had some internal discussions and plan to support the BR example with the Unit Gateway H2 in the future.

[chshu]

@txinto please follow this doc to setup TBR with m5stack Core3 + H2 Unit: https://docs.m5stack.com/en/guide/thread/unit_gateway_h2/thread_border_router.

[txinto]

Hi, that was my first step, and worked, but it does not use the official espressif repository and I am not sure it implements the features at the latest level. Then I switched to Espressif's repo and everything went well until the power cycle. I think I tried to reflash that repo again and did not work, but honestly I cannot remember all the things I did until realising that the br firmware only worked every time I could reflash UIFlow and retry.

In my opinion the unit reboots too early, if there is an issue with the pins or the power line of the RCP, it gets complicated to reflash because the USB port is very unstable. What I did when I understood what was happening is introducing a 2 second delay on boot.

I really though my CoreS3 was broken, because at some moment the ttyACM0 was not mounting at all, but I had 2 complete BR and both of them looked broken at the same time and that looked very improbable so I continue digging and using other computers until I saw they were not broken and could reflash UIFlow and sit down to think on what could explain those symptoms.

At this moment I received my official BR hardware so my M5stack units are parked and I can continue with no issues (and have to recover the lost time) Adding to this repo support to H2 units will prevent others to suffer my frustrating experience.

If I find some spare time in the next week I would try to do it myself so, please tell me the key actions to do so I do not have to research things you already know.

Thanks.

[gytxxsy]

Hi, that was my first step, and worked, but it does not use the official espressif repository and I am not sure it implements the features at the latest level. Then I switched to Espressif's repo and everything went well until the power cycle. I think I tried to reflash that repo again and did not work, but honestly I cannot remember all the things I did until realising that the br firmware only worked every time I could reflash UIFlow and retry.

In my opinion the unit reboots too early, if there is an issue with the pins or the power line of the RCP, it gets complicated to reflash because the USB port is very unstable. What I did when I understood what was happening is introducing a 2 second delay on boot.

I really though my CoreS3 was broken, because at some moment the ttyACM0 was not mounting at all, but I had 2 complete BR and both of them looked broken at the same time and that looked very improbable so I continue digging and using other computers until I saw they were not broken and could reflash UIFlow and sit down to think on what could explain those symptoms.

At this moment I received my official BR hardware so my M5stack units are parked and I can continue with no issues (and have to recover the lost time) Adding to this repo support to H2 units will prevent others to suffer my frustrating experience.

If I find some spare time in the next week I would try to do it myself so, please tell me the key actions to do so I do not have to research things you already know.

Thanks.

We are working on the related support. In the meantime, you can manually enable 5V power supply for PORT.C by following these steps:

1. First, make sure to:
   • Use PORT.C.
   • Disable the AUTO_UPDATE_RCP feature.
   • Set PIN_TO_RCP_TX to 18 and PIN_TO_RCP_RX to 17.
   • Set the baud rate for both host and RCP to 115200 (as 460800 may not work normally).
2. Then, apply the following code in border_router_m5stack.c and call it to enable 5V power supply:

#define BSP_AXP2101_ADDR    0x34
#define BSP_AW9523_ADDR     0x58
#define CORE_S3_BUS_OUT_EN  BIT(1)
#define CORE_S3_BOOST_EN    BIT(7)

void br_m5stack_enable_port_c_power(void)
{
    uint8_t data[2];
    uint8_t val = 0;
    
    data[0] = 0x02;
    i2c_master_write_read_device(BSP_I2C_NUM, BSP_AW9523_ADDR, data, 1, &val, 1, pdMS_TO_TICKS(1000));
    data[1] = val | CORE_S3_BUS_OUT_EN;
    i2c_master_write_to_device(BSP_I2C_NUM, BSP_AW9523_ADDR, data, sizeof(data), pdMS_TO_TICKS(1000));

    data[0] = 0x03;
    i2c_master_write_read_device(BSP_I2C_NUM, BSP_AW9523_ADDR, data, 1, &val, 1, pdMS_TO_TICKS(1000));
    data[1] = val | CORE_S3_BOOST_EN;
    i2c_master_write_to_device(BSP_I2C_NUM, BSP_AW9523_ADDR, data, sizeof(data), pdMS_TO_TICKS(1000));

    data[0] = 0x11;
    data[1] = 0x10;
    i2c_master_write_to_device(BSP_I2C_NUM, BSP_AW9523_ADDR, data, sizeof(data), pdMS_TO_TICKS(1000));
}

3. Please note that due to initialization order requirements, you also need to modify esp_ot_br and border_router_m5stack.c to ensure the following:
   • In esp_ot_br.c, border_router_m5stack_init is called before launch_openthread_border_router.
   • In border_router_m5stack.c, br_m5stack_enable_port_c_power is called after br_m5stack_bsp_init.

[gytxxsy]

The M5Stack example now supports Unit H2. Please refer to Adapting to Unit Gateway H2.

[zwx1995esp]

Hi, @txinto the Uint H2 has been supported in M5Stack example. I will close this iusse, but fell free to re-open it if you have more comments.