RCP_Update Hangs on Dev Board (TZ-2108) #155
Description
Checklist
- Checked the issue tracker for similar issues to ensure this is not a duplicate
- Read the documentation to confirm the issue is not addressed there and your configuration is set correctly
- Tested with the latest version to ensure the issue hasn't been fixed
How often does this bug occurs?
always
Expected behavior
I am following the instructions on https://openthread.io/codelabs/esp-openthread-hardware#4
i have got to the part where i flash the dev board and i get the following, where it seems to hang at the start of RCP_UPDATE
Actual behavior (suspected bug)
it should flash RCP as per documentation
Error logs or terminal output
Hard resetting via RTS pin...
Executing action: monitor
Running idf_monitor in directory /Users/alex/esp-thread-br/examples/basic_thread_border_router
Executing "/Users/alex/.espressif/python_env/idf6.1_py3.14_env/bin/python /Users/alex/esp-idf/tools/idf_monitor.py -p /dev/cu.usbmodem234401 -b 115200 --toolchain-prefix xtensa-esp32s3-elf- --target esp32s3 --revision 0 /Users/alex/esp-thread-br/examples/basic_thread_border_router/build/esp_ot_br.elf /Users/alex/esp-thread-br/examples/basic_thread_border_router/build/bootloader/bootloader.elf -m '/Users/alex/.espressif/python_env/idf6.1_py3.14_env/bin/python' '/Users/alex/esp-idf/tools/idf.py' '-p' '/dev/cu.usbmodem234401'"...
--- esp-idf-monitor 1.8.0 on /dev/cu.usbmodem234401 115200
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x15 (USB_UART_CHIP_RESET),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x4037b392
--- 0x4037b392: esp_cpu_wait_for_intr at /Users/alex/esp-idf/components/esp_hw_support/cpu.c:64
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2820,len:0x15dc
load:0x403c8700,len:0xd3c
--- 0x403c8700: _stext at ??:?
load:0x403cb700,len:0x2fa8
entry 0x403c8900
--- 0x403c8900: call_start_cpu0 at /Users/alex/esp-idf/components/bootloader/subproject/main/bootloader_start.c:25
I (24) boot: ESP-IDF v6.1-dev-1-gff97953b32 2nd stage bootloader
I (24) boot: compile time Oct 29 2025 17:46:55
I (25) boot: Multicore bootloader
I (25) boot: chip revision: v0.2
I (25) boot: efuse block revision: v1.3
I (25) boot.esp32s3: Boot SPI Speed : 80MHz
I (26) boot.esp32s3: SPI Mode : DIO
I (26) boot.esp32s3: SPI Flash Size : 4MB
I (26) boot: Enabling RNG early entropy source...
I (26) boot: Partition Table:
I (26) boot: ## Label Usage Type ST Offset Length
I (27) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (27) boot: 1 otadata OTA data 01 00 0000f000 00002000
I (27) boot: 2 phy_init RF data 01 01 00011000 00001000
I (28) boot: 3 ota_0 OTA app 00 10 00020000 00190000
I (28) boot: 4 ota_1 OTA app 00 11 001b0000 00190000
I (29) boot: 5 web_storage Unknown data 01 82 00340000 00019000
I (29) boot: 6 rcp_fw Unknown data 01 82 00359000 000a0000
I (29) boot: End of partition table
I (30) esp_image: segment 0: paddr=00020020 vaddr=3c110020 size=4ee10h (323088) map
I (88) esp_image: segment 1: paddr=0006ee38 vaddr=3fc97800 size=011e0h ( 4576) load
I (90) esp_image: segment 2: paddr=00070020 vaddr=42000020 size=10d48ch (1102988) map
I (288) esp_image: segment 3: paddr=0017d4b4 vaddr=3fc989e0 size=0460ch ( 17932) load
I (292) esp_image: segment 4: paddr=00181ac8 vaddr=40374000 size=13754h ( 79700) load
I (310) esp_image: segment 5: paddr=00195224 vaddr=50000000 size=00020h ( 32) load
I (319) boot: Loaded app from partition at offset 0x20000
I (319) boot: Disabling RNG early entropy source...
I (320) cpu_start: Multicore app
I (328) cpu_start: GPIO 44 and 43 are used as console UART I/O pins
I (329) cpu_start: Pro cpu start user code
I (329) cpu_start: cpu freq: 160000000 Hz
I (329) app_init: Application information:
I (329) app_init: Project name: esp_ot_br
I (329) app_init: App version: v1.2-18-gc7e758b
I (330) app_init: Compile time: Oct 29 2025 17:46:43
I (330) app_init: ELF file SHA256: 50ef198e2...
I (330) app_init: ESP-IDF: v6.1-dev-1-gff97953b32
I (330) efuse_init: Min chip rev: v0.0
I (330) efuse_init: Max chip rev: v0.99
I (330) efuse_init: Chip rev: v0.2
I (331) heap_init: Initializing. RAM available for dynamic allocation:
I (331) heap_init: At 3FCAD418 len 0003C2F8 (240 KiB): RAM
I (331) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (331) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (331) heap_init: At 600FE000 len 00001FE8 (7 KiB): RTCRAM
I (333) spi_flash: detected chip: generic
I (333) spi_flash: flash io: dio
W (333) spi_flash: Detected size(8192k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
I (334) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (334) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (335) main_task: Started on CPU0
I (345) main_task: Calling app_main()
I (395) mdns_mem: mDNS task will be created from internal RAM
I (405) RCP_UPDATE: RCP: using update sequence 1
I (405) uart: ESP_INTR_FLAG_IRAM flag not set while CONFIG_UART_ISR_IN_IRAM is enabled, flag updated
I (405) OPENTHREAD: spinel UART interface initialization completed
I (405) main_task: Returned from app_main()
W(2415) OPENTHREAD:[W] P-SpinelDrive-: Wait for response timeout
I (2415) uart: ESP_INTR_FLAG_IRAM flag not set while CONFIG_UART_ISR_IN_IRAM is enabled, flag updated
I (2415) esp_ot_br: Internal RCP Version: openthread-esp32/ff97953b32-3b3dd203b; esp32h2; 2025-10-30 00:32:38 UTC
I (2415) uart: ESP_INTR_FLAG_IRAM flag not set while CONFIG_UART_ISR_IN_IRAM is enabled, flag updated
I (2825) RCP_UPDATE: Erasing flash (this may take a while)...
I (2845) RCP_UPDATE: Start programming
I (2845) RCP_UPDATE: binary_size 17360Steps to reproduce the behavior
just followed the instructions on https://openthread.io/codelabs/esp-openthread-hardware#2
Project release version
main
System architecture
ARM 64-bit (Apple M1/M2, Raspberry Pi 4/5)
Operating system
MacOS
Operating system version
Tahoe 26.1 beta
Shell
ZSH
Additional context
No response