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2 changes: 1 addition & 1 deletion docs/en/advanced-topics/firmware-image-format.rst
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,7 @@ The image header is 8 bytes long:
+--------+------------------------------------------------------------------------------------------------+
| 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB) |
| | |
| | Low four bits - Flash frequency (``0`` = 80MHz, ``0`` = 40MHz, ``2`` = 20MHz) |
| | Low four bits - Flash frequency (``0`` = 80MHz, ``1`` = 40MHz, ``2`` = 20MHz) |
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@peterdragun peterdragun Nov 12, 2025

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I believe that this is correct and explained a couple of lines later, after the table in the note: Flash frequency with value ``0`` can mean either 80MHz or 40MHz based on MSPI clock source mode. Basically, there is a clock divider that will be set in ESP-IDF, which defines the final clock frequency.

Also, please note that these values correspond to ones in the code: https://github.com/espressif/esptool/blob/master/esptool/targets/esp32c6.py#L82-L86

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I think this could be improved in a way so it won't raise suspicion about being a mistake. For example:

``0`` = 80MHz or 40MHz

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Ah wonderful, thanks folks for the info and suggestion

+--------+------------------------------------------------------------------------------------------------+
| 4-7 | Entry point address |
+--------+------------------------------------------------------------------------------------------------+
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