[RISCV] Add missing OPERAND_SIMM8_UNSIGNED to RISCVOp enum

Fixes RISCVInstrInfo.cpp build after verifyInstruction gained a case
for OPERAND_SIMM8_UNSIGNED without the matching enum entry.

Co-authored-by: Cursor <cursoragent@cursor.com>

Author: root

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h

@@ -77,6 +77,7 @@ enum OperandType : unsigned {
   OPERAND_SIMM6_NONZERO,
   OPERAND_SIMM8,
   OPERAND_SIMM8_NONZERO,
+  OPERAND_SIMM8_UNSIGNED,
   OPERAND_SIMM10,
   OPERAND_SIMM10_LSB0000_NONZERO,
   OPERAND_SIMM10_UNSIGNED,