Commit 9f00800

chenqian

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[Pass] RISCVEsp32P4MemIntrin src 16|8 align dst 16|8 align var size passed

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3 files changed

+3165

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llvm
- lib/Target/RISCV
  - RISCVEsp32P4MemIntrin.cpp
  - RISCVEsp32P4MemIntrin.h
- test/CodeGen/RISCV
  - esp32p4-memcpy-var.ll

3 files changed

+3165

-117

lines changed

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