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[CSKY] Decode CARRY / GPRSP operands not encoded into instruction (NFCI) (llvm#157338)
The generated decoder can now decode these operands. All we need to do is to add `bits<0>` for these operands to instruction records and provide operand decoders. While here, reformat adjacent lines.
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8 files changed

+155
-200
lines changed

8 files changed

+155
-200
lines changed

‎llvm/lib/Target/CSKY/CMakeLists.txt‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,8 +7,7 @@ tablegen(LLVM CSKYGenAsmWriter.inc -gen-asm-writer)
77
tablegen(LLVM CSKYGenCallingConv.inc -gen-callingconv)
88
tablegen(LLVM CSKYGenCompressInstEmitter.inc -gen-compress-inst-emitter)
99
tablegen(LLVM CSKYGenDAGISel.inc -gen-dag-isel)
10-
tablegen(LLVM CSKYGenDisassemblerTables.inc -gen-disassembler
11-
-ignore-non-decodable-operands)
10+
tablegen(LLVM CSKYGenDisassemblerTables.inc -gen-disassembler)
1211
tablegen(LLVM CSKYGenInstrInfo.inc -gen-instr-info)
1312
tablegen(LLVM CSKYGenMCCodeEmitter.inc -gen-emitter)
1413
tablegen(LLVM CSKYGenMCPseudoLowering.inc -gen-pseudo-lowering)

‎llvm/lib/Target/CSKY/CSKYInstrFormats.td‎

Lines changed: 17 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,9 @@ class I_16_RET<bits<5> sop, bits<5> pcode, string op, list<dag> pattern>
168168
// Instructions(3): cmpnei32, cmphsi32, cmplti32
169169
class I_16_X<bits<5> sop, string op, Operand operand>
170170
: CSKY32Inst<AddrModeNone, 0x3a, (outs CARRY:$ca),
171-
(ins GPR:$rx, operand:$imm16), !strconcat(op, "\t$rx, $imm16"), []> {
171+
(ins GPR:$rx, operand:$imm16),
172+
!strconcat(op, "\t$rx, $imm16"), []> {
173+
bits<0> ca;
172174
bits<16> imm16;
173175
bits<5> rx;
174176
let Inst{25 - 21} = sop;
@@ -263,8 +265,9 @@ class I_12_PP<bits<5> sop, bits<5> pcode, dag outs, dag ins, string op>
263265
class I_5_ZX<bits<6> sop, bits<5> pcode, string op, ImmLeaf ImmType,
264266
list<dag> pattern>
265267
: CSKY32Inst<AddrModeNone, 0x31, (outs GPR:$rz),
266-
(ins CARRY:$cond, GPR:$false, GPR:$rx, ImmType:$imm5),
267-
!strconcat(op, "\t$rz, $rx, $imm5"), pattern> {
268+
(ins CARRY:$cond, GPR:$false, GPR:$rx, ImmType:$imm5),
269+
!strconcat(op, "\t$rz, $rx, $imm5"), pattern> {
270+
bits<0> cond;
268271
bits<5> rz;
269272
bits<5> rx;
270273
bits<5> imm5;
@@ -469,9 +472,10 @@ class I_5_XZ_UZ<bits<6> sop, bits<5> lsb, bits<5> msb, string op, int v>
469472
// Instructions(1): btsti32
470473
class I_5_X<bits<6> sop, bits<5> pcode, string op, ImmLeaf ImmType,
471474
list<dag> pattern>
472-
: CSKY32Inst<AddrModeNone, 0x31,
473-
(outs CARRY:$ca), (ins GPR:$rx, ImmType:$imm5),
474-
!strconcat(op, "\t$rx, $imm5"), pattern> {
475+
: CSKY32Inst<AddrModeNone, 0x31, (outs CARRY:$ca),
476+
(ins GPR:$rx, ImmType:$imm5),
477+
!strconcat(op, "\t$rx, $imm5"), pattern> {
478+
bits<0> ca;
475479
bits<5> imm5;
476480
bits<5> rx;
477481
let Inst{25 - 21} = imm5;
@@ -581,9 +585,9 @@ class R_XXZ<bits<6> sop, bits<5> pcode, dag outs, dag ins, string op,
581585
// Format< OP[6] | RY[5] | RX[5] | SOP[6] | PCODE[5] | 00000[5] >
582586
// Instructions:(4) cmpne32, cmphs32, cmplt32, tst32
583587
class R_YX<bits<6> sop, bits<5> pcode, string op>
584-
: CSKY32Inst<AddrModeNone, 0x31, (outs CARRY:$ca),
585-
(ins GPR:$rx, GPR:$ry),
588+
: CSKY32Inst<AddrModeNone, 0x31, (outs CARRY:$ca), (ins GPR:$rx, GPR:$ry),
586589
!strconcat(op, "\t$rx, $ry"), []> {
590+
bits<0> ca;
587591
bits<5> ry;
588592
bits<5> rx;
589593
let Inst{25 - 21} = ry;
@@ -642,8 +646,9 @@ class R_X<bits<6> sop, bits<5> pcode, dag outs, dag ins, string op, list<dag> pa
642646
// Format< OP[6] | 00000[5] | 00000[5] | SOP[6] | PCODE[5] | RZ[5] >
643647
// Instructions:(2) mvc32, mvcv32
644648
class R_Z_1<bits<6> sop, bits<5> pcode, string op>
645-
: CSKY32Inst<AddrModeNone, 0x31, (outs GPR:$rz),
646-
(ins CARRY:$ca), !strconcat(op, "\t$rz"), []> {
649+
: CSKY32Inst<AddrModeNone, 0x31, (outs GPR:$rz), (ins CARRY:$ca),
650+
!strconcat(op, "\t$rz"), []> {
651+
bits<0> ca;
647652
bits<5> rz;
648653
let Inst{25 - 21} = 0;
649654
let Inst{20 - 16} = 0;
@@ -656,7 +661,8 @@ class R_Z_1<bits<6> sop, bits<5> pcode, string op>
656661
// Instructions:(2) clrf32, clrt32
657662
class R_Z_2<bits<6> sop, bits<5> pcode, string op>
658663
: CSKY32Inst<AddrModeNone, 0x31, (outs GPR:$rz),
659-
(ins CARRY:$ca, GPR:$false), !strconcat(op, "\t$rz"), []> {
664+
(ins CARRY:$ca, GPR:$false), !strconcat(op, "\t$rz"), []> {
665+
bits<0> ca;
660666
bits<5> rz;
661667
let Inst{25 - 21} = rz;
662668
let Inst{20 - 16} = 0;

‎llvm/lib/Target/CSKY/CSKYInstrFormats16Instr.td‎

Lines changed: 20 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,9 @@ class J16<bits<5> sop, string opstr, dag ins>
1616
}
1717

1818
class J16_B<bits<5> sop, string opstr>
19-
: CSKY16Inst<AddrModeNone, (outs), (ins CARRY:$ca, br_symbol_16bit:$offset),
20-
!strconcat(opstr, "\t$offset"), []> {
19+
: CSKY16Inst<AddrModeNone, (outs), (ins CARRY:$ca, br_symbol_16bit:$offset),
20+
!strconcat(opstr, "\t$offset"), []> {
21+
bits<0> ca;
2122
bits<10> offset;
2223
let Inst{15} = 0;
2324
let Inst{14 - 10} = sop;
@@ -66,6 +67,8 @@ class R16_XZ_BINOP_NOPat<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
6667
class R16_XZ_BINOP_C<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
6768
AddrModeNone, (outs sGPR:$rz, CARRY:$cout),
6869
(ins sGPR:$rZ, sGPR:$rx, CARRY:$cin), !strconcat(opstr, "\t$rz, $rx"), []> {
70+
bits<0> cout;
71+
bits<0> cin;
6972
bits<4> rz;
7073
bits<4> rx;
7174
let Inst{15, 14} = 0b01;
@@ -101,9 +104,10 @@ class R16_Z_UNOP<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
101104
let Constraints = "$rz = $rx";
102105
}
103106

104-
class R16_XY_CMP<bits<2> sop, string opstr> : CSKY16Inst<
105-
AddrModeNone, (outs CARRY:$ca), (ins sGPR:$rx, sGPR:$ry), !strconcat(opstr, "\t$rx, $ry"),
106-
[]> {
107+
class R16_XY_CMP<bits<2> sop, string opstr>
108+
: CSKY16Inst<AddrModeNone, (outs CARRY:$ca), (ins sGPR:$rx, sGPR:$ry),
109+
!strconcat(opstr, "\t$rx, $ry"), []> {
110+
bits<0> ca;
107111
bits<4> ry;
108112
bits<4> rx;
109113
let Inst{15, 14} = 0b01;
@@ -145,9 +149,11 @@ class I16_Z_5<bits<3> sop, dag outs, dag ins,string opstr>
145149
let Inst{4 - 0} = imm5;
146150
}
147151

148-
class I16_X_CMP<bits<3> sop, string opstr, Operand Immoperand> : CSKY16Inst<
149-
AddrModeNone, (outs CARRY:$ca), (ins mGPR:$rx, Immoperand:$imm5),
150-
!strconcat(opstr, "\t$rx, $imm5"), []> {
152+
class I16_X_CMP<bits<3> sop, string opstr, Operand Immoperand>
153+
: CSKY16Inst<AddrModeNone, (outs CARRY:$ca),
154+
(ins mGPR:$rx, Immoperand:$imm5),
155+
!strconcat(opstr, "\t$rx, $imm5"), []> {
156+
bits<0> ca;
151157
bits<3> rx;
152158
bits<5> imm5;
153159
let Inst{15, 14} = 0b00;
@@ -158,9 +164,12 @@ class I16_X_CMP<bits<3> sop, string opstr, Operand Immoperand> : CSKY16Inst<
158164
let isCompare = 1;
159165
}
160166

161-
class I16_SP_IMM7<bits<3> sop, string opstr> : CSKY16Inst<
162-
AddrModeNone, (outs GPRSP:$sp2), (ins GPRSP:$sp1, uimm7_2:$imm7),
163-
!strconcat(opstr, "\t$sp2, $sp1, $imm7"), []> {
167+
class I16_SP_IMM7<bits<3> sop, string opstr>
168+
: CSKY16Inst<AddrModeNone, (outs GPRSP:$sp2),
169+
(ins GPRSP:$sp1, uimm7_2:$imm7),
170+
!strconcat(opstr, "\t$sp2, $sp1, $imm7"), []> {
171+
bits<0> sp2;
172+
bits<0> sp1;
164173
bits<7> imm7;
165174
let Inst{15, 14} = 0b00;
166175
let Inst{13 - 10} = 0b0101;

‎llvm/lib/Target/CSKY/CSKYInstrFormatsF1.td‎

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -91,15 +91,21 @@ multiclass FT_XZ<bits<6> sop, string op, PatFrag opnode> {
9191
}
9292

9393
let vrz = 0, isCompare = 1 in {
94-
class F_CMPXY<bits<5> datatype, bits<6> sop, string op, string op_su, RegisterOperand regtype>
95-
: F_XYZ_BASE<datatype, sop, (outs CARRY:$ca), (ins regtype:$vrx, regtype:$vry), !strconcat(op#op_su, "\t$vrx, $vry"),
96-
[]>;
97-
98-
let vry = 0 in{
99-
class F_CMPZX<bits<5> datatype, bits<6> sop, string op, string op_su, RegisterOperand regtype>
100-
: F_XYZ_BASE<datatype, sop, (outs CARRY:$ca), (ins regtype:$vrx), !strconcat(op#op_su, "\t$vrx"),
101-
[]>;
102-
}
94+
class F_CMPXY<bits<5> datatype, bits<6> sop, string op, string op_su,
95+
RegisterOperand regtype>
96+
: F_XYZ_BASE<datatype, sop, (outs CARRY:$ca),
97+
(ins regtype:$vrx, regtype:$vry),
98+
!strconcat(op#op_su, "\t$vrx, $vry"), []> {
99+
bits<0> ca;
100+
}
101+
102+
let vry = 0 in
103+
class F_CMPZX<bits<5> datatype, bits<6> sop, string op, string op_su,
104+
RegisterOperand regtype>
105+
: F_XYZ_BASE<datatype, sop, (outs CARRY:$ca), (ins regtype:$vrx),
106+
!strconcat(op#op_su, "\t$vrx"), []> {
107+
bits<0> ca;
108+
}
103109
}
104110

105111
class F_XYZ<bits<5> datatype, bits<6> sop, string op, string op_su, PatFrag opnode, RegisterOperand regtype>

‎llvm/lib/Target/CSKY/CSKYInstrFormatsF2.td‎

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -91,8 +91,9 @@ multiclass F2_XZ_SET_T<bits<6> sop, string op, string suffix = ""> {
9191
let vrz = 0, isCompare = 1 in
9292
class F2_CXY<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op>
9393
: F2_XYZ<datatype, sop, !strconcat(op, "\t$vrx, $vry"),
94-
(outs CARRY:$ca), (ins regtype:$vrx, regtype:$vry),
95-
[]>;
94+
(outs CARRY:$ca), (ins regtype:$vrx, regtype:$vry), []> {
95+
bits<0> ca;
96+
}
9697

9798
multiclass F2_CXY_T<bits<6> sop, string op> {
9899
def _S : F2_CXY<0b00000, FPR32Op, sop, op#".32">;
@@ -103,9 +104,10 @@ multiclass F2_CXY_T<bits<6> sop, string op> {
103104

104105
let vrz = 0, vry = 0, isCompare = 1 in
105106
class F2_CX<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op>
106-
: F2_XYZ<datatype, sop, !strconcat(op, "\t$vrx"),
107-
(outs CARRY:$ca), (ins regtype:$vrx),
108-
[]>;
107+
: F2_XYZ<datatype, sop, !strconcat(op, "\t$vrx"), (outs CARRY:$ca),
108+
(ins regtype:$vrx), []> {
109+
bits<0> ca;
110+
}
109111

110112
multiclass F2_CX_T<bits<6> sop, string op> {
111113
def _S : F2_CX<0b00000, FPR32Op, sop, op#".32">;
@@ -183,7 +185,10 @@ class F2_LDSTR_D<bits<1> sop, string op, dag outs, dag ins>
183185
class F2_CXYZ<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op>
184186
: F2_XYZ<datatype, sop, !strconcat(op, "\t$vrz, $vrx, $vry"),
185187
(outs regtype:$vrz), (ins CARRY:$ca, regtype:$vrx, regtype:$vry),
186-
[]>;
188+
[]> {
189+
bits<0> ca;
190+
}
191+
187192
multiclass F2_CXYZ_T<bits<6> sop, string op> {
188193
def _S : F2_CXYZ<0b00000, FPR32Op, sop, op#".32">;
189194
let Predicates = [HasFPUv3_DF] in

‎llvm/lib/Target/CSKY/CSKYInstrInfo.td‎

Lines changed: 58 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -586,14 +586,23 @@ let Predicates = [iHasE2] in {
586586
BinOpFrag<(rotl node:$LHS, (and node:$RHS, 0x1f))>, "rotl32">;
587587

588588
def BMASKI32 : I_5_Z<0b010100, 0x1, "bmaski32", oimm5, []>;
589-
def LSLC32 : I_5_XZ<0x13, 0x1, "lslc32",
590-
(outs GPR:$rz, CARRY:$cout), (ins GPR:$rx, oimm5:$imm5), []>;
591-
def LSRC32 : I_5_XZ<0x13, 0x2, "lsrc32",
592-
(outs GPR:$rz, CARRY:$cout), (ins GPR:$rx, oimm5:$imm5), []>;
593-
def ASRC32 : I_5_XZ<0x13, 0x4, "asrc32",
594-
(outs GPR:$rz, CARRY:$cout), (ins GPR:$rx, oimm5:$imm5), []>;
595-
def XSR32 : I_5_XZ<0x13, 0x8, "xsr32",
596-
(outs GPR:$rz, CARRY:$cout), (ins GPR:$rx, oimm5:$imm5, CARRY:$cin), []>;
589+
def LSLC32 : I_5_XZ<0x13, 0x1, "lslc32", (outs GPR:$rz, CARRY:$cout),
590+
(ins GPR:$rx, oimm5:$imm5), []> {
591+
bits<0> cout;
592+
}
593+
def LSRC32 : I_5_XZ<0x13, 0x2, "lsrc32", (outs GPR:$rz, CARRY:$cout),
594+
(ins GPR:$rx, oimm5:$imm5), []> {
595+
bits<0> cout;
596+
}
597+
def ASRC32 : I_5_XZ<0x13, 0x4, "asrc32", (outs GPR:$rz, CARRY:$cout),
598+
(ins GPR:$rx, oimm5:$imm5), []> {
599+
bits<0> cout;
600+
}
601+
def XSR32 : I_5_XZ<0x13, 0x8, "xsr32", (outs GPR:$rz, CARRY:$cout),
602+
(ins GPR:$rx, oimm5:$imm5, CARRY:$cin), []> {
603+
bits<0> cout;
604+
bits<0> cin;
605+
}
597606

598607
def IXH32 : R_YXZ_SP_F1<0x2, 0x1,
599608
BinOpFrag<(add node:$LHS, (shl node:$RHS, (i32 1)))>, "ixh32">;
@@ -605,9 +614,15 @@ let Predicates = [iHasE2] in {
605614

606615
let isCommutable = 1, isAdd = 1 in
607616
def ADDC32 : R_YXZ<0x31, 0x0, 0x2, (outs GPR:$rz, CARRY:$cout),
608-
(ins GPR:$rx, GPR:$ry, CARRY:$cin), "addc32", []>;
617+
(ins GPR:$rx, GPR:$ry, CARRY:$cin), "addc32", []> {
618+
bits<0> cout;
619+
bits<0> cin;
620+
}
609621
def SUBC32 : R_YXZ<0x31, 0x0, 0x8, (outs GPR:$rz, CARRY:$cout),
610-
(ins GPR:$rx, GPR:$ry, CARRY:$cin), "subc32", []>;
622+
(ins GPR:$rx, GPR:$ry, CARRY:$cin), "subc32", []> {
623+
bits<0> cout;
624+
bits<0> cin;
625+
}
611626

612627
def INCF32 : I_5_ZX<0x3, 0x1, "incf32", uimm5, []>;
613628
def INCT32 : I_5_ZX<0x3, 0x2, "inct32", uimm5, []>;
@@ -621,12 +636,18 @@ let Predicates = [iHas2E3] in {
621636
def DIVU32 : R_YXZ_SP_F1<0x20, 0x1,
622637
BinOpFrag<(udiv node:$LHS, node:$RHS)>, "divu32">;
623638

624-
def DECGT32 : I_5_XZ<0x4, 0x1, "decgt32",
625-
(outs GPR:$rz, CARRY:$cout), (ins GPR:$rx, uimm5:$imm5), []>;
626-
def DECLT32 : I_5_XZ<0x4, 0x2, "declt32",
627-
(outs GPR:$rz, CARRY:$cout), (ins GPR:$rx, uimm5:$imm5), []>;
628-
def DECNE32 : I_5_XZ<0x4, 0x4, "decne32",
629-
(outs GPR:$rz, CARRY:$cout), (ins GPR:$rx, uimm5:$imm5), []>;
639+
def DECGT32 : I_5_XZ<0x4, 0x1, "decgt32", (outs GPR:$rz, CARRY:$cout),
640+
(ins GPR:$rx, uimm5:$imm5), []> {
641+
bits<0> cout;
642+
}
643+
def DECLT32 : I_5_XZ<0x4, 0x2, "declt32", (outs GPR:$rz, CARRY:$cout),
644+
(ins GPR:$rx, uimm5:$imm5), []> {
645+
bits<0> cout;
646+
}
647+
def DECNE32 : I_5_XZ<0x4, 0x4, "decne32", (outs GPR:$rz, CARRY:$cout),
648+
(ins GPR:$rx, uimm5:$imm5), []> {
649+
bits<0> cout;
650+
}
630651

631652
def SEXT32 : I_5_XZ_U<0x16, (outs GPR:$rz), (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "sext32", []>;
632653
let isCodeGenOnly = 1 in {
@@ -744,17 +765,19 @@ let Predicates = [iHas2E3] in {
744765
def CMPHS32 : R_YX<0x1, 0x1, "cmphs32">;
745766
def CMPLT32 : R_YX<0x1, 0x2, "cmplt32">;
746767

747-
def SETC32 : CSKY32Inst<AddrModeNone, 0x31,
748-
(outs CARRY:$ca), (ins), "setc32", []> {
768+
def SETC32 : CSKY32Inst<AddrModeNone, 0x31, (outs CARRY:$ca), (ins), "setc32",
769+
[]> {
770+
bits<0> ca;
749771
let Inst{25 - 21} = 0; //rx
750772
let Inst{20 - 16} = 0; //ry
751773
let Inst{15 - 10} = 0x1;
752774
let Inst{9 - 5} = 0x1;
753775
let Inst{4 - 0} = 0;
754776
let isCompare = 1;
755777
}
756-
def CLRC32 : CSKY32Inst<AddrModeNone, 0x31,
757-
(outs CARRY:$ca), (ins), "clrc32", []> {
778+
def CLRC32 : CSKY32Inst<AddrModeNone, 0x31, (outs CARRY:$ca), (ins), "clrc32",
779+
[]> {
780+
bits<0> ca;
758781
let Inst{25 - 21} = 0; //rx
759782
let Inst{20 - 16} = 0; //ry
760783
let Inst{15 - 10} = 0x1;
@@ -764,8 +787,10 @@ let Predicates = [iHas2E3] in {
764787
}
765788

766789
def TST32 : R_YX<0x8, 0x4, "tst32">;
767-
def TSTNBZ32 : R_X<0x8, 0x8,
768-
(outs CARRY:$ca), (ins GPR:$rx), "tstnbz32", []>;
790+
def TSTNBZ32 : R_X<0x8, 0x8, (outs CARRY:$ca), (ins GPR:$rx), "tstnbz32",
791+
[]> {
792+
bits<0> ca;
793+
}
769794
}
770795

771796
//===----------------------------------------------------------------------===//
@@ -806,9 +831,14 @@ let isBranch = 1, isTerminator = 1 in {
806831
[(br bb:$imm16)]>;
807832

808833
def BT32 : I_16_L<0x3, (outs), (ins CARRY:$ca, br_symbol:$imm16),
809-
"bt32\t$imm16", [(brcond CARRY:$ca, bb:$imm16)]>, Requires<[iHasE2]>;
834+
"bt32\t$imm16", [(brcond CARRY:$ca, bb:$imm16)]>,
835+
Requires<[iHasE2]> {
836+
bits<0> ca;
837+
}
810838
def BF32 : I_16_L<0x2, (outs), (ins CARRY:$ca, br_symbol:$imm16),
811-
"bf32\t$imm16", []>, Requires<[iHasE2]>;
839+
"bf32\t$imm16", []>, Requires<[iHasE2]> {
840+
bits<0> ca;
841+
}
812842
}
813843

814844
let Predicates = [iHas2E3] in {
@@ -1030,7 +1060,10 @@ def SE32 : I_5_XZ_PRIVI<0b010110, 0x1, "se32">;
10301060
def WSC32 : I_5_XZ_PRIVI<0b001111, 0x1, "wsc32">;
10311061

10321062
def CPOP32 : I_CPOP<(outs), (ins uimm5:$cpid, uimm20:$usdef), "cpop32 <$cpid, ${usdef}>">;
1033-
def CPRC32 : I_CP<0b0100, (outs CARRY:$ca), (ins uimm5:$cpid, uimm12:$usdef), "cprc32 <$cpid, ${usdef}>">;
1063+
def CPRC32 : I_CP<0b0100, (outs CARRY:$ca), (ins uimm5:$cpid, uimm12:$usdef),
1064+
"cprc32 <$cpid, ${usdef}>"> {
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bits<0> ca;
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}
10341067
def CPRCR32 : I_CP_Z<0b0010, (outs GPR:$rz), (ins uimm5:$cpid, uimm12:$usdef), "cprcr32 $rz, <$cpid, ${usdef}>">;
10351068
def CPRGR32 : I_CP_Z<0b0000, (outs GPR:$rz), (ins uimm5:$cpid, uimm12:$usdef), "cprgr32 $rz, <$cpid, ${usdef}>">;
10361069
def CPWCR32 : I_CP_Z<0b0011, (outs), (ins GPR:$rz, uimm5:$cpid, uimm12:$usdef), "cpwcr32 $rz, <$cpid, ${usdef}>">;

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