ADC doesn't work with external clock

[riccardobastoni97]

Hi everyone,
I don't know why, but If the ADC works with his internal clock everything works properly, but If I try to use another source of clock (external oscillator or even a "timer clock") nothing works (I don't get data ready interrupts). Right now, I'm using this click board for the ADC -> https://www.mouser.it/datasheet/2/272/ADC_9_Click-2528466.pdf
Has anyone had the same problem? Or know what could be the reason?

Thanks for your help

[paul-thelu]

Hi Riccardo,
Could you share the content of the mcp356x_conf.h with us so we can dig into it?

Did you check this section in the datasheet?

And that one?

Might be the reason why no interrupt is triggered.

[riccardobastoni97]

Hi Paul!
Yes I checked them, I didn't use any prescaler between MCLK and AMCLK cause I would like to get a higher sampling frequency.

Anyway... in mcp356x_conf.h:

              #ifndef INC_MCP3562_CONF_H_
              #define INC_MCP3562_CONF_H_

              // 3-channel, auto conversion in SCAN mode
              // 32 bit data format with CHannel ID
              #define MCP3562_USERCONF_REG0 (MCP3562_CONFIG0_VREF_SEL_EXT | MCP3562_CONFIG0_CLK_SEL_EXT | 
              MCP3562_CONFIG0_ADC_MODE_CONV | MCP3562_CONFIG0_CS_SEL_NONE)

              #define MCP3562_USERCONF_REG1 (MCP3562_CONFIG1_OSR_32 | MCP3562_CONFIG1_AMCLK_DIV2) 

              #define MCP3562_USERCONF_REG2 (MCP3562_CONFIG2_BOOST_x1 | MCP3562_CONFIG2_GAIN_x2 | 
              MCP3562_CONFIG2_AZ_MUX_OFF | MCP3562_CONFIG2_AZ_REF_OFF) 

              #define MCP3562_USERCONF_REG3 (MCP3562_CONFIG3_CONV_MODE_CONTINUOUS | 
              MCP3562_CONFIG3_DATA_FORMAT_32BIT_CHID_SGN | MCP3562_CONFIG3_CRCCOM_OFF | 
              MCP3562_CONFIG3_GAINCAL_OFF | MCP3562_CONFIG3_OFFCAL_OFF) 

              #define MCP3562_USERCONF_IRQ_REG (MCP3562_IRQ_MODE_IRQ_HIGH | MCP3562_IRQ_FASTCMD_ON | 
              MCP3562_IRQ_STP_OFF) 

              #define MCP3562_USERCONF_SCAN_REG (MCP3562_SCAN_DLY_NONE | MCP3562_SCAN_CH0 | 
              MCP3562_SCAN_CH1 | MCP3562_SCAN_CH2)

              #define MCP3562_USERCONF_TIMER_VAL (12)

              #endif /* INC_MCP3562_CONF_H_ */

[riccardobastoni97]

In mcp3562.h:

      #define MCP3562_CONFIG0_ADDR             (0x01)
      #define MCP3562_CONFIG0_CLK_SEL_MASK     (0x30) 
      #define _MCP3562_CONFIG0_VREF_SEL_POS    (7)
      #define MCP3562_CONFIG0_VREF_SEL_INT     (0x01 << _MCP3562_CONFIG0_VREF_SEL_POS)  
      #define MCP3562_CONFIG0_VREF_SEL_EXT     (0x00 << _MCP3562_CONFIG0_VREF_SEL_POS)  
      #define _MCP3562_CONFIG0_CLK_SEL_POS     (4)
      #define MCP3562_CONFIG0_CLK_SEL_INT      (0x03 << _MCP3562_CONFIG0_CLK_SEL_POS)  
      #define MCP3562_CONFIG0_CLK_SEL_EXT      (0x00 << _MCP3562_CONFIG0_CLK_SEL_POS) 
      #define _MCP3562_CONFIG0_CS_SEL_POS      (2)
      #define MCP3562_CONFIG0_CS_SEL_15uA      (0x03 << _MCP3562_CONFIG0_CS_SEL_POS)
      #define MCP3562_CONFIG0_CS_SEL_3_7uA     (0x02 << _MCP3562_CONFIG0_CS_SEL_POS)
      #define MCP3562_CONFIG0_CS_SEL_0_9uA     (0x01 << _MCP3562_CONFIG0_CS_SEL_POS)
      #define MCP3562_CONFIG0_CS_SEL_NONE      (0x00 << _MCP3562_CONFIG0_CS_SEL_POS)
      #define _MCP3562_CONFIG0_ADC_MODE_POS    (0)
      #define MCP3562_CONFIG0_ADC_MODE_CONV    (0x03 << _MCP3562_CONFIG0_ADC_MODE_POS) 
      #define MCP3562_CONFIG0_ADC_MODE_STANDBY (0x02 << _MCP3562_CONFIG0_ADC_MODE_POS)
      #define MCP3562_CONFIG0_ADC_MODE_OFF     (0x00 << _MCP3562_CONFIG0_ADC_MODE_POS)

[riccardobastoni97]

I use this external 8 MHz oscillator directly linked to the MCLK pin.