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Commit 59ac3f1

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Maximilian
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Fixed RDMA ACK-writeback registers in cnfg_slave_avx.sv
1 parent cdf54c8 commit 59ac3f1

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Lines changed: 3 additions & 3 deletions

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hw/hdl/shell/cnfg_slave_avx.sv

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1173,7 +1173,7 @@ end
11731173
assign rdma_done_rd.ready = (rdma_rd_C && rdma_done_rd.valid);
11741174

11751175
assign a_we_rdma_rd = (rdma_clear_rd || rdma_rd_C) ? ~0 : 0;
1176-
assign a_data_in_rdma_rd = rdma_clear_rd ? 0 : a_data_out_rdma_wr + 1;
1176+
assign a_data_in_rdma_rd = rdma_clear_rd ? 0 : a_data_out_rdma_rd + 1;
11771177
assign a_addr_rdma_rd = rdma_clear_rd ? rdma_clear_addr_rd : rdma_done_rd.data.pid;
11781178
assign b_addr_rdma_rd = axi_araddr[ADDR_LSB+:PID_BITS];
11791179

@@ -1301,13 +1301,13 @@ queue_meta #(.QDEPTH(8)) inst_meta_wback_wr (.aclk(aclk), .aresetn(aresetn), .s_
13011301

13021302
`ifdef EN_RDMA
13031303
assign wback[2].valid = rdma_clear_rd || rdma_rd_C;
1304-
assign wback[2].data.paddr = rdma_clear_rd ? (rdma_clear_addr_rd << 2) + slv_reg[WBACK_REG][WBACK_RMT_RD_OFFS+:PADDR_BITS] : (rdma_done_rd.data << 2) + slv_reg[WBACK_REG][WBACK_RMT_RD_OFFS+:PADDR_BITS];
1304+
assign wback[2].data.paddr = rdma_clear_rd ? (rdma_clear_addr_rd << 2) + slv_reg[WBACK_REG][WBACK_RMT_RD_OFFS+:PADDR_BITS] : (rdma_done_rd.data.pid << 2) + slv_reg[WBACK_REG][WBACK_RMT_RD_OFFS+:PADDR_BITS];
13051305
assign wback[2].data.value = rdma_clear_rd ? 0 : a_data_out_rdma_rd + 1'b1;
13061306
assign wback[2].data.rsrvd = 0;
13071307
queue_meta #(.QDEPTH(8)) inst_meta_wback_rdma_rd (.aclk(aclk), .aresetn(aresetn), .s_meta(wback[2]), .m_meta(wback_q[2]));
13081308

13091309
assign wback[3].valid = rdma_clear_wr || rdma_wr_C;
1310-
assign wback[3].data.paddr = rdma_clear_wr ? (rdma_clear_addr_wr << 2) + slv_reg[WBACK_REG][WBACK_RMT_WR_OFFS+:PADDR_BITS] : (rdma_done_wr.data << 2) + slv_reg[WBACK_REG][WBACK_RMT_WR_OFFS+:PADDR_BITS];
1310+
assign wback[3].data.paddr = rdma_clear_wr ? (rdma_clear_addr_wr << 2) + slv_reg[WBACK_REG][WBACK_RMT_WR_OFFS+:PADDR_BITS] : (rdma_done_wr.data.pid << 2) + slv_reg[WBACK_REG][WBACK_RMT_WR_OFFS+:PADDR_BITS];
13111311
assign wback[3].data.value = rdma_clear_wr ? 0 : a_data_out_rdma_wr + 1'b1;
13121312
assign wback[3].data.rsrvd = 0;
13131313
queue_meta #(.QDEPTH(8)) inst_meta_wback_rdma_wr (.aclk(aclk), .aresetn(aresetn), .s_meta(wback[3]), .m_meta(wback_q[3]));

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