Preparing v1.13.0-rc1 (#486)

adamjw24 · web-flow · commit 632e4b17dd31 · 2024-12-06T06:48:10.000+01:00
* Preparing v1.13.0-rc1, improvements fixes

* Bump version
diff --git a/.github/workflows/Build.yml b/.github/workflows/Build.yml
@@ -29,6 +29,13 @@ jobs:
               generators: "Visual Studio 17 2022",
               msvc_arch: Win32
             }
+          - {
+              name: "Windows MSVC arm64",
+              os: windows-2022,
+              environment_script: "C:/Program Files/Microsoft Visual Studio/2022/Enterprise/VC/Auxiliary/Build/vcvars64.bat",
+              generators: "Visual Studio 17 2022",
+              msvc_arch: arm64,
+            }
           - {
               name: "Windows MinGW",
               os: windows-2022,
diff --git a/.gitlab-ci-internal.yml b/.gitlab-ci-internal.yml
@@ -265,6 +265,14 @@ test_vc193x:
   tags:
     - vc193x
 
+test_vc193x_arm64:
+  extends: .build_test_msvc_template
+  variables:
+     MSVC_ARCH: arm64
+     CONFIG_OPTIONS: "-DVVENC_OVERRIDE_COMPILER_CHECK=1"
+  tags:
+    - vc193x-arm
+
 test_macos-x86_64:
    extends: .build_test_macos_template
    variables:
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -10,10 +10,10 @@ if( NOT CMAKE_VERSION VERSION_LESS 3.13.0 )
 endif()
 
 # project name
-project( vvenc VERSION 1.12.1 )
+project( vvenc VERSION 1.13.0 )
 
 # set alternative version numbering for release candidates
-#set( PROJECT_VERSION_RC rc1 )
+set( PROJECT_VERSION_RC rc1 )
 if( PROJECT_VERSION_RC )
     set( PROJECT_VERSION "${PROJECT_VERSION}-${PROJECT_VERSION_RC}" )
 endif()
diff --git a/source/Lib/CommonLib/RdCost.h b/source/Lib/CommonLib/RdCost.h
@@ -255,7 +255,7 @@ class RdCost
   template <X86_VEXT vext>
   static void xGetSADX5_8xN_SIMD    ( const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos );
   template <X86_VEXT vext>
-  static void xGetSADX5_16xN_SIMD   ( const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos );
+  static void xGetSADX5_16xN_SIMD_X86   ( const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos );
 
   template<X86_VEXT vext, bool fastHad>
   static Distortion xGetHADs_SIMD   ( const DistParam& pcDtParam );
@@ -268,7 +268,7 @@ class RdCost
 
 #ifdef TARGET_SIMD_ARM
   template <ARM_VEXT vext>
-  static void xGetSADX5_16xN_SIMD   ( const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos );
+  static void xGetSADX5_16xN_SIMD_ARM   ( const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos );
 
   template <ARM_VEXT vext>
   static Distortion xGetHAD2SADs_ARMSIMD( const DistParam &rcDtParam );
diff --git a/source/Lib/CommonLib/arm/BufferARM.h b/source/Lib/CommonLib/arm/BufferARM.h
diff --git a/source/Lib/CommonLib/arm/InterPredARM.h b/source/Lib/CommonLib/arm/InterPredARM.h
@@ -77,7 +77,8 @@ static inline void calcBIOSums_Neon(const Pel* srcY0Tmp, const Pel* srcY1Tmp, co
   int16x8_t sumAbsGYTmp    = vdupq_n_s16(0);
   int16x8_t sumDIYTmp      = vdupq_n_s16(0);
   int16x8_t sumSignGyGxTmp = vdupq_n_s16(0);
-  int16x8_t x = {1, 1, 1, 1, 1, 1, 0, 0};
+  int16_t vals[8] = {1, 1, 1, 1, 1, 1, 0, 0};
+  int16x8_t x = vld1q_s16(vals);
 
   for (int y = 0; y < 3; y++)
   {
@@ -93,9 +94,9 @@ static inline void calcBIOSums_Neon(const Pel* srcY0Tmp, const Pel* srcY1Tmp, co
     int16x8_t packTempY     =  vshrq_n_s16( vaddq_s16(loadGradY0, loadGradY1), 1 );
     int16x8_t gX            = vabsq_s16(packTempX);
     int16x8_t gY            = vabsq_s16(packTempY);
-    int16x8_t dIX           = vmulq_s16(subTemp1,vreinterpretq_s16_u16(vcleq_s16(packTempX, vdupq_n_s16(0))-vcgeq_s16(packTempX,vdupq_n_s16(0))));
-    int16x8_t dIY           = vmulq_s16(subTemp1,vreinterpretq_s16_u16(vcleq_s16(packTempY, vdupq_n_s16(0))-vcgeq_s16(packTempY,vdupq_n_s16(0))));
-    int16x8_t signGY_GX     = vmulq_s16(packTempX,vreinterpretq_s16_u16(vcleq_s16(packTempY, vdupq_n_s16(0))-vcgeq_s16(packTempY,vdupq_n_s16(0))));
+    int16x8_t dIX           = vmulq_s16(subTemp1,vreinterpretq_s16_u16( vsubq_u16( vcleq_s16(packTempX, vdupq_n_s16(0)), vcgeq_s16(packTempX,vdupq_n_s16(0)) )));
+    int16x8_t dIY           = vmulq_s16(subTemp1,vreinterpretq_s16_u16( vsubq_u16( vcleq_s16(packTempY, vdupq_n_s16(0)), vcgeq_s16(packTempY,vdupq_n_s16(0)) )));
+    int16x8_t signGY_GX     = vmulq_s16(packTempX,vreinterpretq_s16_u16( vsubq_u16( vcleq_s16(packTempY, vdupq_n_s16(0)), vcgeq_s16(packTempY,vdupq_n_s16(0)) )));
     
     sumAbsGXTmp     = vaddq_s16(sumAbsGXTmp, gX);
     sumAbsGYTmp     = vaddq_s16(sumAbsGYTmp, gY);
@@ -124,9 +125,9 @@ static inline void calcBIOSums_Neon(const Pel* srcY0Tmp, const Pel* srcY1Tmp, co
     gX            = vabsq_s16(packTempX);
     gY            = vabsq_s16(packTempY);
     
-    dIX           = vmulq_s16(subTemp1,vreinterpretq_s16_u16(vcleq_s16(packTempX, vdupq_n_s16(0))-vcgeq_s16(packTempX,vdupq_n_s16(0))));
-    dIY           = vmulq_s16(subTemp1,vreinterpretq_s16_u16(vcleq_s16(packTempY, vdupq_n_s16(0))-vcgeq_s16(packTempY,vdupq_n_s16(0))));
-    signGY_GX     = vmulq_s16(packTempX,vreinterpretq_s16_u16(vcleq_s16(packTempY, vdupq_n_s16(0))-vcgeq_s16(packTempY,vdupq_n_s16(0))));
+    dIX           = vmulq_s16(subTemp1,vreinterpretq_s16_u16( vsubq_u16( vcleq_s16(packTempX, vdupq_n_s16(0)), vcgeq_s16(packTempX,vdupq_n_s16(0)) )));
+    dIY           = vmulq_s16(subTemp1,vreinterpretq_s16_u16( vsubq_u16( vcleq_s16(packTempY, vdupq_n_s16(0)), vcgeq_s16(packTempY,vdupq_n_s16(0)) )));
+    signGY_GX     = vmulq_s16(packTempX,vreinterpretq_s16_u16( vsubq_u16( vcleq_s16(packTempY, vdupq_n_s16(0)), vcgeq_s16(packTempY,vdupq_n_s16(0)) )));
   
     sumAbsGXTmp     = vaddq_s16(sumAbsGXTmp, gX);
     sumAbsGYTmp     = vaddq_s16(sumAbsGYTmp, gY);
diff --git a/source/Lib/CommonLib/arm/RdCostARM.h b/source/Lib/CommonLib/arm/RdCostARM.h
@@ -915,7 +915,7 @@ Distortion RdCost::xGetHAD2SADs_ARMSIMD( const DistParam &rcDtParam )
 #endif  // defined( TARGET_SIMD_X86 )
 
 template<ARM_VEXT vext, bool isCalCentrePos>
-void xGetSADX5_16xN_SIMDImp( const DistParam& rcDtParam, Distortion* cost )
+void xGetSADX5_16xN_SIMDImp_ARM( const DistParam& rcDtParam, Distortion* cost )
 {
   int        i, j;
   const Pel* piOrg      = rcDtParam.org.buf;
@@ -990,7 +990,7 @@ void xGetSADX5_16xN_SIMDImp( const DistParam& rcDtParam, Distortion* cost )
 }
 
 template <ARM_VEXT vext>
-void RdCost::xGetSADX5_16xN_SIMD(const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos)
+void RdCost::xGetSADX5_16xN_SIMD_ARM(const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos)
 {
   if( rcDtParam.bitDepth > 10 )
   {
@@ -999,9 +999,9 @@ void RdCost::xGetSADX5_16xN_SIMD(const DistParam& rcDtParam, Distortion* cost, b
   }
 
   if( isCalCentrePos )
-    xGetSADX5_16xN_SIMDImp<vext, true>( rcDtParam, cost );
+    xGetSADX5_16xN_SIMDImp_ARM<vext, true>( rcDtParam, cost );
   else
-    xGetSADX5_16xN_SIMDImp<vext, false>( rcDtParam, cost );
+    xGetSADX5_16xN_SIMDImp_ARM<vext, false>( rcDtParam, cost );
 }
 
 template< int iWidth, ARM_VEXT vext >
@@ -1169,7 +1169,7 @@ Distortion RdCost::xGetSADwMask_ARMSIMD( const DistParam& rcDtParam )
 template<ARM_VEXT vext>
 void RdCost::_initRdCostARM()
 {
-  m_afpDistortFuncX5[1] = xGetSADX5_16xN_SIMD<vext>;
+  m_afpDistortFuncX5[1] = xGetSADX5_16xN_SIMD_ARM<vext>;
 
 #if defined( TARGET_SIMD_X86 )
   m_afpDistortFunc[0][DF_HAD_2SAD ] = RdCost::xGetHAD2SADs_ARMSIMD<vext>;
diff --git a/source/Lib/CommonLib/arm/neon/InterpolationFilter_neon.cpp b/source/Lib/CommonLib/arm/neon/InterpolationFilter_neon.cpp
@@ -178,9 +178,10 @@ static int16x8_t filter8xX_N8_neon( Pel const* src, int16x8_t ch, int32x4_t voff
 
 static int16x8x2_t filter16xX_N8_neon( Pel const* src, int16x8_t ch, int32x4_t voffset1, int32x4_t invshift1st )
 {
-  int16x8_t a = filter8xX_N8_neon( src + 0, ch, voffset1, invshift1st );
-  int16x8_t b = filter8xX_N8_neon( src + 8, ch, voffset1, invshift1st );
-  return ( int16x8x2_t ){ a, b };
+  int16x8x2_t result;
+  result.val[0] = filter8xX_N8_neon( src + 0, ch, voffset1, invshift1st );
+  result.val[1] = filter8xX_N8_neon( src + 8, ch, voffset1, invshift1st );
+  return result; // explicit return since MSVC for arm64 does not support direct return with typecast
 }
 
 template<bool isLast>
diff --git a/source/Lib/CommonLib/arm/neon/Trafo_neon.cpp b/source/Lib/CommonLib/arm/neon/Trafo_neon.cpp
@@ -63,7 +63,7 @@ namespace vvenc
 
 static inline int64_t shift_and_round( int64_t x, int shift )
 {
-  return ( x + ( 1 << ( shift - 1 ) ) ) >> shift;
+  return ( x + ( static_cast<int64_t>(1) << ( shift - 1 ) ) ) >> shift;
 }
 
 template<unsigned trSize>
diff --git a/source/Lib/CommonLib/x86/RdCostX86.h b/source/Lib/CommonLib/x86/RdCostX86.h
@@ -3250,7 +3250,7 @@ void RdCost::xGetSADX5_8xN_SIMD(const DistParam& rcDtParam, Distortion* cost, bo
 }
 
 template <X86_VEXT vext, bool isCalCentrePos>
-void xGetSADX5_16xN_SIMDImp(const DistParam& rcDtParam, Distortion* cost) {
+void xGetSADX5_16xN_SIMDImp_X86(const DistParam& rcDtParam, Distortion* cost) {
   int i, j;
   const Pel* piOrg = rcDtParam.org.buf;
   const Pel* piCur = rcDtParam.cur.buf - 4;
@@ -3549,16 +3549,16 @@ void xGetSADX5_16xN_SIMDImp(const DistParam& rcDtParam, Distortion* cost) {
 }
 
 template <X86_VEXT vext>
-void RdCost::xGetSADX5_16xN_SIMD(const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos) {
+void RdCost::xGetSADX5_16xN_SIMD_X86(const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos) {
   if( rcDtParam.bitDepth > 10 ){
     RdCost::xGetSAD16X5( rcDtParam, cost, isCalCentrePos );
     return;
   }
   
   if (isCalCentrePos)
-    xGetSADX5_16xN_SIMDImp<vext, true>(rcDtParam, cost);
+    xGetSADX5_16xN_SIMDImp_X86<vext, true>(rcDtParam, cost);
   else
-    xGetSADX5_16xN_SIMDImp<vext, false>(rcDtParam, cost);
+    xGetSADX5_16xN_SIMDImp_X86<vext, false>(rcDtParam, cost);
 }
 
 template <X86_VEXT vext>
@@ -3611,7 +3611,7 @@ void RdCost::_initRdCostX86()
   m_fxdWtdPredPtr = fixWeightedSSE_SIMD <vext>;
 
   m_afpDistortFuncX5[0] = xGetSADX5_8xN_SIMD <vext>;
-  m_afpDistortFuncX5[1] = xGetSADX5_16xN_SIMD<vext>;
+  m_afpDistortFuncX5[1] = xGetSADX5_16xN_SIMD_X86<vext>;
 }
 
 template void RdCost::_initRdCostX86<SIMDX86>();
diff --git a/source/Lib/EncoderLib/BitAllocation.cpp b/source/Lib/EncoderLib/BitAllocation.cpp
@@ -532,7 +532,7 @@ int BitAllocation::applyQPAdaptationSlice (const Slice* slice, const VVEncCfg* e
   const uint32_t hpFrameRate  = (pic->force2ndOrder ? 32 : encCfg->m_FrameRate / encCfg->m_FrameScale);
   const int  bitDepth         = slice->sps->bitDepths[CH_L];
   double hpEnerPicNorm        = 1.0 / getAveragePictureActivity (encCfg->m_SourceWidth, encCfg->m_SourceHeight, (encCfg->m_RCNumPasses == 2 ? 0 : ctuPumpRedQP.back()),
-                                                                 (encCfg->m_usePerceptQPATempFiltISlice || !slice->isIntra()), bitDepth);
+                                                                 (encCfg->m_internalUsePerceptQPATempFiltISlice || !slice->isIntra()), bitDepth);
   const PreCalcValues& pcv    = *pic->cs->pcv;
 
   pic->picInitialQP = sliceQP;  // modified below and used in applyQPAdaptationSubCtu
@@ -600,7 +600,7 @@ int BitAllocation::applyQPAdaptationSlice (const Slice* slice, const VVEncCfg* e
 
         pic->picVA.spatAct[ CH_L ] = ClipBD (uint16_t ((picSpVisAct + (nCtu >> 1)) / nCtu), 12);
       }
-      if (encCfg->m_usePerceptQPATempFiltISlice && slice->isIntra() && pic->getOrigBuf (compID).buf != pic->getOrigBufPrev (compID, PREV_FRAME_1).buf && zeroMinActCTUs * 2 > ctuBoundingAddr - ctuStartAddr)
+      if (encCfg->m_internalUsePerceptQPATempFiltISlice && slice->isIntra() && pic->getOrigBuf (compID).buf != pic->getOrigBufPrev (compID, PREV_FRAME_1).buf && zeroMinActCTUs * 2 > ctuBoundingAddr - ctuStartAddr)
       {
         hpEnerPicNorm *= sqrt (zeroMinActCTUs * 2.0 / float (ctuBoundingAddr - ctuStartAddr)); // frozen-image mode
       }
@@ -659,7 +659,7 @@ int BitAllocation::applyQPAdaptationSlice (const Slice* slice, const VVEncCfg* e
     }
   }
 
-  if (encCfg->m_RCNumPasses == 2 && (encCfg->m_RCTargetBitrate > 0) && (ctuRCQPMemory != nullptr) && slice->pps->useDQP && (encCfg->m_usePerceptQPATempFiltISlice == 2) && slice->isIntra())
+  if (encCfg->m_RCNumPasses == 2 && (encCfg->m_RCTargetBitrate > 0) && (ctuRCQPMemory != nullptr) && slice->pps->useDQP && (encCfg->m_internalUsePerceptQPATempFiltISlice == 2) && slice->isIntra())
   {
     const int nCtu = int (ctuBoundingAddr - ctuStartAddr);
     const int offs = (slice->poc / encCfg->m_IntraPeriod) * ((nCtu + 1) >> 1);
@@ -700,7 +700,7 @@ int BitAllocation::applyQPAdaptationSlice (const Slice* slice, const VVEncCfg* e
       const double hpEnerCTU = pic->ctuQpaLambda[ctuRsAddr];
       int adaptedLumaQP = Clip3 (0, MAX_QP, sliceQP + apprI3Log2 (hpEnerCTU * hpEnerPicNorm, isSccStrongRC));
 
-      if ((encCfg->m_usePerceptQPATempFiltISlice == 2) && slice->isIntra() && (ctuPumpRedQP.size() > ctuRsAddr))
+      if ((encCfg->m_internalUsePerceptQPATempFiltISlice == 2) && slice->isIntra() && (ctuPumpRedQP.size() > ctuRsAddr))
       {
         if (rcIsFirstPassOf2) // backup 1st-pass I-frame QP for 2nd rate control pass
         {
@@ -716,7 +716,7 @@ int BitAllocation::applyQPAdaptationSlice (const Slice* slice, const VVEncCfg* e
 
         ctuPumpRedQP[ctuRsAddr] = 0; // reset QP memory for temporal pumping analysis
       }
-      if ((encCfg->m_usePerceptQPATempFiltISlice == 2) && !slice->isIntra() && (slice->TLayer == 0) && rcIsFirstPassOf2 && (adaptedLumaQP < MAX_QP))
+      if ((encCfg->m_internalUsePerceptQPATempFiltISlice == 2) && !slice->isIntra() && (slice->TLayer == 0) && rcIsFirstPassOf2 && (adaptedLumaQP < MAX_QP))
       {
         adaptedLumaQP++; // this is a first-pass tuning to stabilize the rate control
       }
@@ -839,7 +839,7 @@ int BitAllocation::applyQPAdaptationSubCtu (const Slice* slice, const VVEncCfg*
                                                                    picPrv1.buf, picPrv1.stride, picPrv2.buf, picPrv2.stride, hpFrameRate,
                                                                    bitDepth, isHighResolution);
   const double hpEnerPicNorm  = 1.0 / getAveragePictureActivity (encCfg->m_SourceWidth, encCfg->m_SourceHeight, 0,
-                                                                 (encCfg->m_usePerceptQPATempFiltISlice || !slice->isIntra()), bitDepth);
+                                                                 (encCfg->m_internalUsePerceptQPATempFiltISlice || !slice->isIntra()), bitDepth);
   int adaptedSubCtuQP = Clip3 (0, MAX_QP, pic->picInitialQP + apprI3Log2 (hpEnerSubCTU * hpEnerPicNorm, isSccStrongRC));
 
   if (isChromaEnabled (pic->chromaFormat) && (adaptedSubCtuQP < MAX_QP))
diff --git a/source/Lib/EncoderLib/EncCfg.cpp b/source/Lib/EncoderLib/EncCfg.cpp
@@ -129,6 +129,17 @@ void VVEncCfg::xInitCfgMembers()
     m_fg.m_fgcSEINumModelValuesMinus1[1] = 0;
     m_fg.m_fgcSEINumModelValuesMinus1[2] = 0;
   }
+  
+  if( m_usePerceptQPATempFiltISlice > 2 )
+  {
+    m_internalUsePerceptQPATempFiltISlice = m_usePerceptQPATempFiltISlice - 2;
+    m_disableForce2ndOderFilter           = true;
+  }
+  else
+  {
+    m_internalUsePerceptQPATempFiltISlice = m_usePerceptQPATempFiltISlice;
+    m_disableForce2ndOderFilter           = false;
+  }
 }
 
 }
diff --git a/source/Lib/EncoderLib/EncCfg.h b/source/Lib/EncoderLib/EncCfg.h
@@ -93,6 +93,8 @@ struct VVEncCfg : public vvenc_config
   bool      m_reuseCuResults;
   int       m_splitCostThrParamId;
   vvencFG   m_fg;
+  int       m_internalUsePerceptQPATempFiltISlice;
+  bool      m_disableForce2ndOderFilter;
 
 private:
   void xInitCfgMembers();
diff --git a/source/Lib/EncoderLib/EncCu.cpp b/source/Lib/EncoderLib/EncCu.cpp
@@ -81,8 +81,8 @@ const MergeIdxPair EncCu::m_GeoModeTest[GEO_MAX_NUM_CANDS] = { MergeIdxPair{0, 1
 
 const double EncCu::coefSquareCUs[2][5][2][2][2] = {
 {{{{-1.00000000, -1.00000000, }, {-1.00000000, -1.00000000, }, },  {{-1.00000000, -1.00000000, }, {-1.00000000, -1.00000000, }, },  },
-{{{-1.00000000, -1.00000000, }, {0.06213828, 0.00611228, }, },  {{-1.00000000, -1.00000000, }, {0.06943756, 0.00320762, }, },  },
 {{{-1.00000000, -1.00000000, }, {-1.00000000, -1.00000000, }, },  {{-1.00000000, -1.00000000, }, {-1.00000000, -1.00000000, }, },  },
+{{{-1.00000000, -1.00000000, }, {0.07848505, 0.00225808, }, },  {{-1.00000000, -1.00000000, }, {0.07509575, 0.00204789, }, },  },
 {{{-1.00000000, -1.00000000, }, {0.10833051, 0.00053144, }, },  {{-1.00000000, -1.00000000, }, {0.08304352, 0.00142876, }, },  },
 {{{-1.00000000, -1.00000000, }, {-1.00000000, -1.00000000, }, },  {{-1.00000000, -1.00000000, }, {-1.00000000, -1.00000000, }, },  },
 },
@@ -603,7 +603,7 @@ void EncCu::xCompressCU( CodingStructure*& tempCS, CodingStructure*& bestCS, Par
     {
       if (m_pcEncCfg->m_usePerceptQPA)
       {
-        if (m_pcEncCfg->m_usePerceptQPATempFiltISlice == 2)
+        if (m_pcEncCfg->m_internalUsePerceptQPATempFiltISlice == 2)
         {
           m_tempQpDiff = pic->ctuAdaptedQP[ctuRsAddr] - BitAllocation::applyQPAdaptationSubCtu (&slice, m_pcEncCfg, lumaArea, m_pcRateCtrl->getMinNoiseLevels());
         }
@@ -622,7 +622,7 @@ void EncCu::xCompressCU( CodingStructure*& tempCS, CodingStructure*& bestCS, Par
           tempCS->currQP[partitioner.chType] = tempCS->baseQP =
           bestCS->currQP[partitioner.chType] = bestCS->baseQP = std::min (std::min (adQPTL, adQPTR), std::min (adQPBL, adQPBR));
 
-          if (m_pcEncCfg->m_usePerceptQPATempFiltISlice == 2)
+          if (m_pcEncCfg->m_internalUsePerceptQPATempFiltISlice == 2)
           {
             if ((m_globalCtuQpVector->size() > ctuRsAddr) && (slice.TLayer == 0) && // last CTU row of non-Intra key-frame
                 (m_pcEncCfg->m_IntraPeriod == 2 * m_pcEncCfg->m_GOPSize) && (ctuRsAddr >= pcv.widthInCtus) && (uiTPelY + pcv.maxCUSize > m_pcEncCfg->m_PadSourceHeight))
@@ -668,7 +668,7 @@ void EncCu::xCompressCU( CodingStructure*& tempCS, CodingStructure*& bestCS, Par
       CHECK ((partitioner.currArea().lwidth() >= pcv.maxCUSize) || (partitioner.currArea().lheight() >= pcv.maxCUSize), "sub-CTU delta-QP error");
       tempCS->currQP[partitioner.chType] = tempCS->baseQP = BitAllocation::applyQPAdaptationSubCtu (&slice, m_pcEncCfg, lumaArea, m_pcRateCtrl->getMinNoiseLevels());
 
-      if (m_pcEncCfg->m_usePerceptQPATempFiltISlice == 2)
+      if (m_pcEncCfg->m_internalUsePerceptQPATempFiltISlice == 2)
       {
         tempCS->currQP[partitioner.chType] = tempCS->baseQP = Clip3 (0, MAX_QP, tempCS->baseQP + m_tempQpDiff);
       }
@@ -1748,7 +1748,7 @@ void EncCu::xCheckRDCostUnifiedMerge( CodingStructure *&tempCS, CodingStructure
     addGpmCandsToPruningList( gpmMergeCtx, localUnitArea, sqrtLambdaForFirstPass, ctxStart, comboList, geoBuffer, distParam, *cu );
   }
 
-  if(    m_pcEncCfg->m_usePerceptQPATempFiltISlice == 2 && m_uiSadBestForQPA < MAX_DISTORTION && slice.TLayer == 0 // non-Intra key-frame
+  if(    m_pcEncCfg->m_internalUsePerceptQPATempFiltISlice == 2 && m_uiSadBestForQPA < MAX_DISTORTION && slice.TLayer == 0 // non-Intra key-frame
       && m_pcEncCfg->m_salienceBasedOpt
       && m_pcEncCfg->m_usePerceptQPA && partitioner.currQgEnable() && partitioner.currSubdiv == 0 ) // CTU-level luma quantization group
   {
diff --git a/source/Lib/EncoderLib/EncGOP.cpp b/source/Lib/EncoderLib/EncGOP.cpp
@@ -216,7 +216,7 @@ void EncGOP::init( const VVEncCfg& encCfg, const GOPCfg* gopCfg, RateCtrl& rateC
 
   if (encCfg.m_usePerceptQPA)
   {
-    m_globalCtuQpVector.resize( pps0.useDQP && (encCfg.m_usePerceptQPATempFiltISlice == 2) && encCfg.m_salienceBasedOpt ? pps0.picWidthInCtu * pps0.picHeightInCtu + 1 : 1 );
+    m_globalCtuQpVector.resize( pps0.useDQP && (encCfg.m_internalUsePerceptQPATempFiltISlice == 2) && encCfg.m_salienceBasedOpt ? pps0.picWidthInCtu * pps0.picHeightInCtu + 1 : 1 );
   }
 
   if( m_pcEncCfg->m_FrameRate && m_pcEncCfg->m_TicksPerSecond > 0 )
@@ -1810,7 +1810,7 @@ void EncGOP::xInitGopQpCascade( Picture& keyPic, PicList::const_iterator picList
     const int bDepth = m_pcEncCfg->m_internalBitDepth[CH_L];
     const int intraP = Clip3(m_pcEncCfg->m_GOPSize, 4 * VVENC_MAX_GOP, m_pcEncCfg->m_IntraPeriod);
     const int visAct = std::max(uint16_t(spVisActTL0[CH_L] >> (12 - bDepth)), keyPic.picVA.visAct); // when vaY=0
-    const double apa = sqrt((m_pcEncCfg->m_usePerceptQPATempFiltISlice ? 32.0 : 16.0) * double(1 << (2 * bDepth - 10)) / sqrt(resRatio4K)); // average picture activity
+    const double apa = sqrt((m_pcEncCfg->m_internalUsePerceptQPATempFiltISlice ? 32.0 : 16.0) * double(1 << (2 * bDepth - 10)) / sqrt(resRatio4K)); // average picture activity
     const int auxOff = (m_pcEncCfg->m_blockImportanceMapping && !keyPic.m_picShared->m_ctuBimQpOffset.empty() ? keyPic.m_picShared->m_picAuxQpOffset : 0) + dQP;
     const int iFrmQP = std::min(MAX_QP, m_pcEncCfg->m_QP + m_pcEncCfg->m_intraQPOffset + auxOff + int(floor(3.0 * log(visAct / apa) / log(2.0) + 0.5)));
     const int qp32BC = int(16384.0 + 7.21875 * pow((double)spVisActTL0[CH_L], 4.0 / 3.0) + 1.46875 * pow((double)spVisActTL0[CH_C], 4.0 / 3.0)) * (isHighRes ? 96 : 24); // TODO hlm
@@ -1861,6 +1861,10 @@ void EncGOP::xInitGopQpCascade( Picture& keyPic, PicList::const_iterator picList
 
   keyPic.gopAdaptedQP = dQP; // TODO: add any additional key-frame offset here
   keyPic.force2ndOrder = f2O;
+  if( m_pcEncCfg->m_disableForce2ndOderFilter )
+  {
+    keyPic.force2ndOrder = false;
+  }
 
   if(m_pcEncCfg->m_rateCap)
   {
diff --git a/source/Lib/apputils/VVEncAppCfg.h b/source/Lib/apputils/VVEncAppCfg.h
diff --git a/source/Lib/vvenc/vvencCfg.cpp b/source/Lib/vvenc/vvencCfg.cpp

Original file line number	Diff line number	Diff line change
`@@ -915,7 +915,7 @@ Distortion RdCost::xGetHAD2SADs_ARMSIMD( const DistParam &rcDtParam )`
`915`	`915`	`#endif // defined( TARGET_SIMD_X86 )`
`916`	`916`
`917`	`917`	`template<ARM_VEXT vext, bool isCalCentrePos>`
`918`		`-void xGetSADX5_16xN_SIMDImp( const DistParam& rcDtParam, Distortion* cost )`
	`918`	`+void xGetSADX5_16xN_SIMDImp_ARM( const DistParam& rcDtParam, Distortion* cost )`
`919`	`919`	`{`
`920`	`920`	`int i, j;`
`921`	`921`	`const Pel* piOrg = rcDtParam.org.buf;`
`@@ -990,7 +990,7 @@ void xGetSADX5_16xN_SIMDImp( const DistParam& rcDtParam, Distortion* cost )`
`990`	`990`	`}`
`991`	`991`
`992`	`992`	`template <ARM_VEXT vext>`
`993`		`-void RdCost::xGetSADX5_16xN_SIMD(const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos)`
	`993`	`+void RdCost::xGetSADX5_16xN_SIMD_ARM(const DistParam& rcDtParam, Distortion* cost, bool isCalCentrePos)`
`994`	`994`	`{`
`995`	`995`	`if( rcDtParam.bitDepth > 10 )`
`996`	`996`	`{`
`@@ -999,9 +999,9 @@ void RdCost::xGetSADX5_16xN_SIMD(const DistParam& rcDtParam, Distortion* cost, b`
`999`	`999`	`}`
`1000`	`1000`
`1001`	`1001`	`if( isCalCentrePos )`
`1002`		`- xGetSADX5_16xN_SIMDImp<vext, true>( rcDtParam, cost );`
	`1002`	`+ xGetSADX5_16xN_SIMDImp_ARM<vext, true>( rcDtParam, cost );`
`1003`	`1003`	`else`
`1004`		`- xGetSADX5_16xN_SIMDImp<vext, false>( rcDtParam, cost );`
	`1004`	`+ xGetSADX5_16xN_SIMDImp_ARM<vext, false>( rcDtParam, cost );`
`1005`	`1005`	`}`
`1006`	`1006`
`1007`	`1007`	`template< int iWidth, ARM_VEXT vext >`
`@@ -1169,7 +1169,7 @@ Distortion RdCost::xGetSADwMask_ARMSIMD( const DistParam& rcDtParam )`
`1169`	`1169`	`template<ARM_VEXT vext>`
`1170`	`1170`	`void RdCost::_initRdCostARM()`
`1171`	`1171`	`{`
`1172`		`- m_afpDistortFuncX5[1] = xGetSADX5_16xN_SIMD<vext>;`
	`1172`	`+ m_afpDistortFuncX5[1] = xGetSADX5_16xN_SIMD_ARM<vext>;`
`1173`	`1173`
`1174`	`1174`	`#if defined( TARGET_SIMD_X86 )`
`1175`	`1175`	`m_afpDistortFunc[0][DF_HAD_2SAD ] = RdCost::xGetHAD2SADs_ARMSIMD<vext>;`
Original file line number	Diff line number	Diff line change
`@@ -178,9 +178,10 @@ static int16x8_t filter8xX_N8_neon( Pel const* src, int16x8_t ch, int32x4_t voff`
`178`	`178`
`179`	`179`	`static int16x8x2_t filter16xX_N8_neon( Pel const* src, int16x8_t ch, int32x4_t voffset1, int32x4_t invshift1st )`
`180`	`180`	`{`
`181`		`- int16x8_t a = filter8xX_N8_neon( src + 0, ch, voffset1, invshift1st );`
`182`		`- int16x8_t b = filter8xX_N8_neon( src + 8, ch, voffset1, invshift1st );`
`183`		`- return ( int16x8x2_t ){ a, b };`
	`181`	`+ int16x8x2_t result;`
	`182`	`+ result.val[0] = filter8xX_N8_neon( src + 0, ch, voffset1, invshift1st );`
	`183`	`+ result.val[1] = filter8xX_N8_neon( src + 8, ch, voffset1, invshift1st );`
	`184`	`+ return result; // explicit return since MSVC for arm64 does not support direct return with typecast`
`184`	`185`	`}`
`185`	`186`
`186`	`187`	`template<bool isLast>`
Original file line number	Diff line number	Diff line change
`@@ -63,7 +63,7 @@ namespace vvenc`
`63`	`63`
`64`	`64`	`static inline int64_t shift_and_round( int64_t x, int shift )`
`65`	`65`	`{`
`66`		`- return ( x + ( 1 << ( shift - 1 ) ) ) >> shift;`
	`66`	`+ return ( x + ( static_cast<int64_t>(1) << ( shift - 1 ) ) ) >> shift;`
`67`	`67`	`}`
`68`	`68`
`69`	`69`	`template<unsigned trSize>`