1717// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1818// ---------------------------------------------------------------------------
1919
20- #define __ENVELOPE_CC__
21- #include " envelope.h"
22-
23- // ----------------------------------------------------------------------------
24- // Constructor.
25- // ----------------------------------------------------------------------------
26- __attribute__ ( ( optimize( " Os" ) ) ) EnvelopeGenerator::EnvelopeGenerator()
27- {
28- reset ();
29- }
30-
31- // ----------------------------------------------------------------------------
32- // SID reset.
33- // ----------------------------------------------------------------------------
34- void __attribute__ ( ( optimize( " Os" ) ) ) EnvelopeGenerator::reset()
35- {
36- envelope_counter = 0 ;
37-
38- attack = 0 ;
39- decay = 0 ;
40- sustain = 0 ;
41- release = 0 ;
4220
43- gate = 0 ;
44-
45- rate_counter = 0 ;
46- exponential_counter = 0 ;
47- exponential_counter_period = 1 ;
48-
49- state = RELEASE;
50- rate_period = rate_counter_period[release];
51- hold_zero = true ;
52- }
21+ // please note that modifications have been made to this source code
22+ // for the use in the SIDKick pico firmware!
5323
24+ #define __ENVELOPE_CC__
25+ #include " envelope.h"
5426
5527// Rate counter periods are calculated from the Envelope Rates table in
5628// the Programmer's Reference Guide. The rate counter period is the number of
@@ -96,23 +68,23 @@ void __attribute__( ( optimize( "Os" ) ) ) EnvelopeGenerator::reset()
9668// The described method is thus sufficient for exact calculation of the rate
9769// periods.
9870//
99- short EnvelopeGenerator::rate_counter_period[] = {
100- 9 , // 2ms*1.0MHz/256 = 7.81
101- 32 , // 8ms*1.0MHz/256 = 31.25
102- 63 , // 16ms*1.0MHz/256 = 62.50
103- 95 , // 24ms*1.0MHz/256 = 93.75
104- 149 , // 38ms*1.0MHz/256 = 148.44
105- 220 , // 56ms*1.0MHz/256 = 218.75
106- 267 , // 68ms*1.0MHz/256 = 265.63
107- 313 , // 80ms*1.0MHz/256 = 312.50
108- 392 , // 100ms*1.0MHz/256 = 390.63
109- 977 , // 250ms*1.0MHz/256 = 976.56
110- 1954 , // 500ms*1.0MHz/256 = 1953.13
111- 3126 , // 800ms*1.0MHz/256 = 3125.00
112- 3907 , // 1 s*1.0MHz/256 = 3906.25
113- 11720 , // 3 s*1.0MHz/256 = 11718.75
114- 19532 , // 5 s*1.0MHz/256 = 19531.25
115- 31251 // 8 s*1.0MHz/256 = 31250.00
71+ reg16 EnvelopeGenerator::rate_counter_period[] = {
72+ 8 , // 2ms*1.0MHz/256 = 7.81
73+ 31 , // 8ms*1.0MHz/256 = 31.25
74+ 62 , // 16ms*1.0MHz/256 = 62.50
75+ 94 , // 24ms*1.0MHz/256 = 93.75
76+ 148 , // 38ms*1.0MHz/256 = 148.44
77+ 219 , // 56ms*1.0MHz/256 = 218.75
78+ 266 , // 68ms*1.0MHz/256 = 265.63
79+ 312 , // 80ms*1.0MHz/256 = 312.50
80+ 391 , // 100ms*1.0MHz/256 = 390.63
81+ 976 , // 250ms*1.0MHz/256 = 976.56
82+ 1953 , // 500ms*1.0MHz/256 = 1953.13
83+ 3125 , // 800ms*1.0MHz/256 = 3125.00
84+ 3906 , // 1 s*1.0MHz/256 = 3906.25
85+ 11719 , // 3 s*1.0MHz/256 = 11718.75
86+ 19531 , // 5 s*1.0MHz/256 = 19531.25
87+ 31250 // 8 s*1.0MHz/256 = 31250.00
11688};
11789
11890
@@ -146,14 +118,14 @@ short EnvelopeGenerator::rate_counter_period[] = {
146118// (255 + 162*1 + 39*2 + 28*4 + 12*8 + 8*16 + 6*30)*32 = 756*32 = 32352
147119// which corresponds exactly to the timed value divided by the number of
148120// complete envelopes.
149- // NB! This one cycle delay is not modeled.
121+ // NB! This one cycle delay is only modeled for single cycle clocking .
150122
151123
152124// From the sustain levels it follows that both the low and high 4 bits of the
153125// envelope counter are compared to the 4-bit sustain value.
154126// This has been verified by sampling ENV3.
155127//
156- unsigned char EnvelopeGenerator::sustain_level[] = {
128+ reg8 EnvelopeGenerator::sustain_level[] = {
157129 0x00 ,
158130 0x11 ,
159131 0x22 ,
@@ -173,55 +145,122 @@ unsigned char EnvelopeGenerator::sustain_level[] = {
173145};
174146
175147
148+ // DAC lookup tables.
149+ /* unsigned short EnvelopeGenerator::model_dac[ 2 ][ 1 << 8 ] = {
150+ {0},
151+ {0},
152+ };*/
153+
154+
176155// ----------------------------------------------------------------------------
177- // Register functions .
156+ // Constructor .
178157// ----------------------------------------------------------------------------
179- void EnvelopeGenerator::writeCONTROL_REG (reg8 control )
158+ EnvelopeGenerator::EnvelopeGenerator ( )
180159{
181- reg8 gate_next = control & 0x01 ;
160+ static bool class_init ;
182161
183- // The rate counter is never reset, thus there will be a delay before the
184- // envelope counter starts counting up (attack) or down (release).
162+ /* if ( !class_init ) {
163+ // Build DAC lookup tables for 8-bit DACs.
164+ // MOS 6581: 2R/R ~ 2.20, missing termination resistor.
165+ build_dac_table( model_dac[ 0 ], 8, 2.20, false );
166+ // MOS 8580: 2R/R ~ 2.00, correct termination.
167+ build_dac_table( model_dac[ 1 ], 8, 2.00, true );
185168
186- // Gate bit on: Start attack, decay, sustain.
187- if (!gate && gate_next) {
188- state = ATTACK;
189- rate_period = rate_counter_period[attack];
169+ class_init = true;
170+ }*/
171+
172+ set_chip_model ( MOS6581 );
173+
174+ // Counter's odd bits are high on powerup
175+ envelope_counter = 0xaa ;
176+
177+ reset ();
178+ }
179+
180+ // ----------------------------------------------------------------------------
181+ // SID reset.
182+ // ----------------------------------------------------------------------------
183+ void EnvelopeGenerator::reset ()
184+ {
185+ // counter is not changed on reset
186+ envelope_pipeline = 0 ;
187+ exponential_pipeline = 0 ;
188+
189+ state_pipeline = 0 ;
190+
191+ attack = 0 ;
192+ decay = 0 ;
193+ sustain = 0 ;
194+ release = 0 ;
195+
196+ gate = 0 ;
197+
198+ rate_counter = 0 ;
199+ exponential_counter = 0 ;
200+ exponential_counter_period = 1 ;
201+ new_exponential_counter_period = 0 ;
202+ reset_rate_counter = false ;
190203
191- // Switching to attack state unlocks the zero freeze.
192- hold_zero = false ;
193- }
194- // Gate bit off: Start release.
195- else if (gate && !gate_next) {
196204 state = RELEASE;
197- rate_period = rate_counter_period[release];
198- }
205+ rate_period = rate_counter_period[ release ];
206+ hold_zero = false ;
207+
208+ next_state = RELEASE;
209+ env3 = 0 ;
210+ envelope_counter = 0xaa ;
211+ }
212+
213+
214+ // ----------------------------------------------------------------------------
215+ // Set chip model.
216+ // ----------------------------------------------------------------------------
217+ void EnvelopeGenerator::set_chip_model ( chip_model model )
218+ {
219+ sid_model = model;
220+ }
221+
222+
223+ // ----------------------------------------------------------------------------
224+ // Register functions.
225+ // ----------------------------------------------------------------------------
226+ void EnvelopeGenerator::writeCONTROL_REG ( reg8 control )
227+ {
228+ reg8 gate_next = control & 0x01 ;
229+
230+ // The rate counter is never reset, thus there will be a delay before the
231+ // envelope counter starts counting up (attack) or down (release).
232+
233+ if ( gate != gate_next ) {
234+ // Gate bit on: Start attack, decay, sustain.
235+ // Gate bit off: Start release.
236+ next_state = gate_next ? ATTACK : RELEASE;
237+ state_pipeline = 2 ;
199238
200- gate = gate_next;
239+ gate = gate_next;
240+ }
201241}
202242
203- void EnvelopeGenerator::writeATTACK_DECAY (reg8 attack_decay)
243+ void EnvelopeGenerator::writeATTACK_DECAY ( reg8 attack_decay )
204244{
205- attack = (attack_decay >> 4 ) & 0x0f ;
206- decay = attack_decay & 0x0f ;
207- if (state == ATTACK) {
208- rate_period = rate_counter_period[attack];
209- }
210- else if (state == DECAY_SUSTAIN) {
211- rate_period = rate_counter_period[decay];
212- }
245+ attack = ( attack_decay >> 4 ) & 0x0f ;
246+ decay = attack_decay & 0x0f ;
247+ if ( state == ATTACK ) {
248+ rate_period = rate_counter_period[ attack ];
249+ } else if ( state == DECAY_SUSTAIN ) {
250+ rate_period = rate_counter_period[ decay ];
251+ }
213252}
214253
215- void EnvelopeGenerator::writeSUSTAIN_RELEASE (reg8 sustain_release)
254+ void EnvelopeGenerator::writeSUSTAIN_RELEASE ( reg8 sustain_release )
216255{
217- sustain = (sustain_release >> 4 ) & 0x0f ;
218- release = sustain_release & 0x0f ;
219- if (state == RELEASE) {
220- rate_period = rate_counter_period[release];
221- }
256+ sustain = ( sustain_release >> 4 ) & 0x0f ;
257+ release = sustain_release & 0x0f ;
258+ if ( state == RELEASE ) {
259+ rate_period = rate_counter_period[ release ];
260+ }
222261}
223262
224263reg8 EnvelopeGenerator::readENV ()
225264{
226- return output () ;
265+ return env3 ;
227266}
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