allow simd constexpr vec to work on arches such as riscv

glm only utilizes simd intrinsics for aarch64 and x86_64, but other platforms will now benefit from the arch-agnostic simd constructors and arithmetic operators used in the c++20 vec implementation

Author: sharkautarch

glm/detail/qualifier.hpp

@@ -107,7 +107,7 @@ namespace detail
 		};
 #	endif
 
-#if (defined(__clang__) || defined(__GNUC__)) && (GLM_LANG_CXX20_FLAG & GLM_LANG)
+#if ((defined(__clang__) || defined(__GNUC__)) && (GLM_LANG_CXX20_FLAG & GLM_LANG)) && GLM_SIMD_CONSTEXPR
 	template <typename T>
 	static constexpr size_t requiredAlignment = alignof(T);
 
@@ -127,7 +127,7 @@ namespace detail
 	struct storage<2, T, true>
 	{
 		using VType = std::conditional_t< std::is_same_v<T, bool>, uint8_t, T>;
-		typedef VType type __attribute__((aligned(sizeof(VType)),vector_size(2*sizeof(VType))));
+		typedef VType type __attribute__((aligned(2*sizeof(VType)),vector_size(2*sizeof(VType))));
 	};
 
 	template<typename T>
@@ -149,6 +149,14 @@ namespace detail
 		using VType = std::conditional_t< std::is_same_v<T, bool>, uint8_t, T>;
 		typedef VType type __attribute__((aligned( requiredAlignment<T> ), vector_size(4*sizeof(VType))));
 	};
+# if (!(GLM_ARCH & GLM_ARCH_SIMD_BIT))
+	template<typename T>
+	struct storage<4, T, true>
+	{
+		using VType = std::conditional_t< std::is_same_v<T, bool>, uint8_t, T>;
+		typedef VType type __attribute__((aligned(4*sizeof(VType)),vector_size(sizeof(VType))));
+	};
+# endif
 #endif
 
 #	if GLM_ARCH & GLM_ARCH_SSE2_BIT

glm/detail/setup.hpp

@@ -883,7 +883,7 @@ namespace detail
 #	define GLM_FORCE_ALIGNED_GENTYPES
 #endif
 
-#if GLM_HAS_ALIGNOF && (GLM_LANG & GLM_LANG_CXXMS_FLAG) && (defined(GLM_FORCE_ALIGNED_GENTYPES) || (GLM_CONFIG_SIMD == GLM_ENABLE))
+#if (GLM_HAS_ALIGNOF && (GLM_LANG & GLM_LANG_CXXMS_FLAG) && (defined(GLM_FORCE_ALIGNED_GENTYPES) || (GLM_CONFIG_SIMD == GLM_ENABLE))) || GLM_SIMD_CONSTEXPR
 #	define GLM_CONFIG_ALIGNED_GENTYPES GLM_ENABLE
 #else
 #	define GLM_CONFIG_ALIGNED_GENTYPES GLM_DISABLE

glm/detail/simd_constexpr/vec.hpp

@@ -23,6 +23,7 @@
 #include <variant>
 #include <cstring>
 #include <ranges>
+#include <algorithm>
 namespace glm
 {
 #ifdef __clang__

test/core/core_c++20_simd_constexpr.cpp

@@ -1,4 +1,5 @@
 #define GLM_SIMD_CONSTEXPR 1
+#include <cmath>
 #include <glm/glm.hpp>
 #include <glm/vec4.hpp>
 #include <cstdio>
@@ -15,10 +16,11 @@
 
 int main()
 {
+#if defined(__x86_64__) || defined(__aarch64__)
         static_assert(GLM_ARCH & GLM_ARCH_SIMD_BIT);
         static_assert(GLM_CONFIG_SIMD);
         static_assert(GLM_ARCH_SIMD_BIT);
-       
+#endif
 
         using avec4 = glm::vec<4, float, glm::aligned_highp>;
         static constexpr avec4 v{1.0f};//, 1.1f, 1.2f, 1.0f};