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Commit 97c72fb

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opt: add more chip init
1 parent 7e1c99e commit 97c72fb

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src/fw/board/boards/board_em_lb525.c

Lines changed: 93 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -162,11 +162,104 @@ void BSP_LCD_PowerUp(void)
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uint32_t BSP_GetOtpBase(void)
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{
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return MPI2_MEM_BASE;
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}
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void HAL_PreInit(void)
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{
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// __asm("B .");
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/* not switch back to XT48 if other clock source has been selected already */
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if (RCC_SYSCLK_HRC48 == HAL_RCC_HCPU_GetClockSrc(RCC_CLK_MOD_SYS))
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{
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// To avoid somebody cancel request.
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HAL_HPAON_EnableXT48();
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HAL_RCC_HCPU_ClockSelect(RCC_CLK_MOD_SYS, RCC_SYSCLK_HXT48);
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}
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HAL_RCC_HCPU_ClockSelect(RCC_CLK_MOD_HP_PERI, RCC_CLK_PERI_HXT48);
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if (PM_STANDBY_BOOT != SystemPowerOnModeGet())
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{
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// Halt LCPU first to avoid LCPU in running state
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HAL_HPAON_WakeCore(CORE_ID_LCPU);
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HAL_RCC_Reset_and_Halt_LCPU(1);
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// get system configure from EFUSE
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BSP_System_Config();
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HAL_HPAON_StartGTimer();
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HAL_PMU_EnableRC32K(1);
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HAL_PMU_LpCLockSelect(PMU_LPCLK_RC32);
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HAL_PMU_EnableDLL(1);
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HAL_PMU_EnableXTAL32();
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if (HAL_PMU_LXTReady() != HAL_OK)
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HAL_ASSERT(0);
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// RTC/GTIME/LPTIME Using same low power clock source
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HAL_RTC_ENABLE_LXT();
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{
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uint8_t is_enable_lxt = 1;
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uint32_t wdt_staus = 0xFF;
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uint32_t wdt_time = 0;
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uint16_t wdt_clk = 32768;
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uint8_t is_lcpu_rccal = 1;
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HAL_LCPU_CONFIG_set(HAL_LCPU_CONFIG_XTAL_ENABLED, &is_enable_lxt, 1);
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HAL_LCPU_CONFIG_set(HAL_LCPU_CONFIG_WDT_STATUS, &wdt_staus, 4);
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HAL_LCPU_CONFIG_set(HAL_LCPU_CONFIG_WDT_TIME, &wdt_time, 4);
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HAL_LCPU_CONFIG_set(HAL_LCPU_CONFIG_WDT_CLK_FEQ, &wdt_clk, 2);
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HAL_LCPU_CONFIG_set(HAL_LCPU_CONFIG_BT_RC_CAL_IN_L, &is_lcpu_rccal, 1);
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HAL_PMU_SetWdt((uint32_t)hwp_wdt2); // Add reboot cause for watchdog2
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}
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HAL_RCC_LCPU_ClockSelect(RCC_CLK_MOD_LP_PERI, RCC_CLK_PERI_HXT48);
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HAL_HPAON_CANCEL_LP_ACTIVE_REQUEST();
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}
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HAL_RCC_HCPU_ConfigHCLK(240);
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// Reset sysclk used by HAL_Delay_us
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HAL_Delay_us(0);
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//HAL_sw_breakpoint();
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}
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void board_early_init(void) {
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HAL_StatusTypeDef status;
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#if defined(HAL_V2D_GPU_MODULE_ENABLED)
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HAL_RCC_ResetModule(RCC_MOD_GPU);
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#endif
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HAL_PreInit();
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#ifdef SOC_BF0_HCPU
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if (PM_STANDBY_BOOT != SystemPowerOnModeGet())
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{
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// Except Standby mode, all other boot mode need to re-calibrate RC48
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status = HAL_RCC_CalibrateRC48();
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HAL_ASSERT(HAL_OK == status);
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}
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#endif /* SOC_BF0_HCPU */
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HAL_RCC_Init();
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#ifdef SOC_BF0_HCPU
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if (PM_STANDBY_BOOT != SystemPowerOnModeGet())
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{
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HAL_PMU_Init();
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}
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#endif /* SOC_BF0_HCPU */
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#ifdef SOC_BF0_HCPU
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/* init AES_ACC as normal mode */
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__HAL_SYSCFG_CLEAR_SECURITY();
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HAL_EFUSE_Init();
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#endif
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}
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