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gmarullgangheivt
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boards/asterix: format file
So CI is happy. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
1 parent 52d6b5f commit c256d03

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Lines changed: 72 additions & 69 deletions

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src/fw/board/boards/board_asterix.c

Lines changed: 72 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -1,71 +1,70 @@
1-
#include "board/board.h"
1+
#include <nrfx_i2s.h>
22

3+
#include "board/board.h"
4+
#include "drivers/flash/qspi_flash_definitions.h"
35
#include "drivers/gpio.h"
46
#include "drivers/i2c.h"
5-
#include "drivers/nrf5/uart_definitions.h"
7+
#include "drivers/i2c_definitions.h"
68
#include "drivers/nrf5/i2c_hal_definitions.h"
79
#include "drivers/nrf5/spi_definitions.h"
8-
#include "drivers/flash/qspi_flash_definitions.h"
9-
#include "drivers/i2c_definitions.h"
10+
#include "drivers/nrf5/uart_definitions.h"
11+
#include "drivers/pwm.h"
1012
#include "drivers/qspi_definitions.h"
1113
#include "drivers/temperature.h"
1214
#include "drivers/voltage_monitor.h"
1315
#include "flash_region/flash_region.h"
14-
#include "util/units.h"
15-
#include "system/passert.h"
1616
#include "kernel/util/sleep.h"
17-
#include "drivers/pwm.h"
18-
19-
#include <nrfx_i2s.h>
17+
#include "system/passert.h"
18+
#include "util/units.h"
2019

2120
// QSPI
22-
#include <nrfx_qspi.h>
21+
#include <hal/nrf_clock.h>
22+
#include <hal/nrf_gpio.h>
2323
#include <nrfx_gpiote.h>
24+
#include <nrfx_qspi.h>
2425
#include <nrfx_spim.h>
2526
#include <nrfx_twim.h>
26-
#include <hal/nrf_gpio.h>
27-
#include <hal/nrf_clock.h>
28-
2927

3028
static QSPIPortState s_qspi_port_state;
3129
static QSPIPort QSPI_PORT = {
32-
.state = &s_qspi_port_state,
33-
.auto_polling_interval = 16,
34-
.cs_gpio = NRF_GPIO_PIN_MAP(0, 17),
35-
.clk_gpio = NRF_GPIO_PIN_MAP(0, 19),
36-
.data_gpio = {
37-
NRF_GPIO_PIN_MAP(0, 20),
38-
NRF_GPIO_PIN_MAP(0, 21),
39-
NRF_GPIO_PIN_MAP(0, 22),
40-
NRF_GPIO_PIN_MAP(0, 23),
41-
},
30+
.state = &s_qspi_port_state,
31+
.auto_polling_interval = 16,
32+
.cs_gpio = NRF_GPIO_PIN_MAP(0, 17),
33+
.clk_gpio = NRF_GPIO_PIN_MAP(0, 19),
34+
.data_gpio =
35+
{
36+
NRF_GPIO_PIN_MAP(0, 20),
37+
NRF_GPIO_PIN_MAP(0, 21),
38+
NRF_GPIO_PIN_MAP(0, 22),
39+
NRF_GPIO_PIN_MAP(0, 23),
40+
},
4241
};
43-
QSPIPort * const QSPI = &QSPI_PORT;
42+
QSPIPort *const QSPI = &QSPI_PORT;
4443

4544
static QSPIFlashState s_qspi_flash_state;
4645
static QSPIFlash QSPI_FLASH_DEVICE = {
47-
.state = &s_qspi_flash_state,
48-
.qspi = &QSPI_PORT,
49-
.default_fast_read_ddr_enabled = false,
50-
.read_mode = QSPI_FLASH_READ_READ4IO,
51-
.write_mode = QSPI_FLASH_WRITE_PP4O,
52-
.reset_gpio = { GPIO_Port_NULL },
46+
.state = &s_qspi_flash_state,
47+
.qspi = &QSPI_PORT,
48+
.default_fast_read_ddr_enabled = false,
49+
.read_mode = QSPI_FLASH_READ_READ4IO,
50+
.write_mode = QSPI_FLASH_WRITE_PP4O,
51+
.reset_gpio = {GPIO_Port_NULL},
5352
};
54-
QSPIFlash * const QSPI_FLASH = &QSPI_FLASH_DEVICE;
53+
QSPIFlash *const QSPI_FLASH = &QSPI_FLASH_DEVICE;
5554
IRQ_MAP_NRFX(QSPI, nrfx_qspi_irq_handler);
5655
/* PERIPHERAL ID 43 */
5756

5857
static UARTDeviceState s_dbg_uart_state;
5958
static UARTDevice DBG_UART_DEVICE = {
60-
.state = &s_dbg_uart_state,
61-
.tx_gpio = NRF_GPIO_PIN_MAP(0, 27),
62-
.rx_gpio = NRF_GPIO_PIN_MAP(0, 5),
63-
.rts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
64-
.cts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
65-
.periph = NRFX_UARTE_INSTANCE(0),
66-
.counter = NRFX_TIMER_INSTANCE(2),
59+
.state = &s_dbg_uart_state,
60+
.tx_gpio = NRF_GPIO_PIN_MAP(0, 27),
61+
.rx_gpio = NRF_GPIO_PIN_MAP(0, 5),
62+
.rts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
63+
.cts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
64+
.periph = NRFX_UARTE_INSTANCE(0),
65+
.counter = NRFX_TIMER_INSTANCE(2),
6766
};
68-
UARTDevice * const DBG_UART = &DBG_UART_DEVICE;
67+
UARTDevice *const DBG_UART = &DBG_UART_DEVICE;
6968
IRQ_MAP_NRFX(UART0_UARTE0, nrfx_uarte_0_irq_handler);
7069
/* PERIPHERAL ID 8 */
7170

@@ -85,54 +84,58 @@ IRQ_MAP_NRFX(GPIOTE, nrfx_gpiote_0_irq_handler);
8584
static I2CBusState I2C_NPMC_IIC1_BUS_STATE = {};
8685

8786
static const I2CBusHal I2C_NPMC_IIC1_BUS_HAL = {
88-
.twim = NRFX_TWIM_INSTANCE(1),
89-
.frequency = NRF_TWIM_FREQ_400K,
87+
.twim = NRFX_TWIM_INSTANCE(1),
88+
.frequency = NRF_TWIM_FREQ_400K,
9089
};
9190

9291
static const I2CBus I2C_NPMC_IIC1_BUS = {
93-
.state = &I2C_NPMC_IIC1_BUS_STATE,
94-
.hal = &I2C_NPMC_IIC1_BUS_HAL,
95-
.scl_gpio = {
96-
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
97-
.gpio_pin = NRF_GPIO_PIN_MAP(0, 14),
98-
},
99-
.sda_gpio = {
100-
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
101-
.gpio_pin = NRF_GPIO_PIN_MAP(0, 15),
102-
},
103-
.name = "I2C_NPMC_IIC1"
92+
.state = &I2C_NPMC_IIC1_BUS_STATE,
93+
.hal = &I2C_NPMC_IIC1_BUS_HAL,
94+
.scl_gpio =
95+
{
96+
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
97+
.gpio_pin = NRF_GPIO_PIN_MAP(0, 14),
98+
},
99+
.sda_gpio =
100+
{
101+
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
102+
.gpio_pin = NRF_GPIO_PIN_MAP(0, 15),
103+
},
104+
.name = "I2C_NPMC_IIC1",
104105
};
105106
IRQ_MAP_NRFX(SPI1_SPIM1_SPIS1_TWI1_TWIM1_TWIS1, nrfx_twim_1_irq_handler);
106107
/* PERIPHERAL ID 9 */
107108

108109
static const I2CSlavePort I2C_SLAVE_NPM1300 = {
109-
.bus = &I2C_NPMC_IIC1_BUS,
110-
.address = 0xD6,
110+
.bus = &I2C_NPMC_IIC1_BUS,
111+
.address = 0xD6,
111112
};
112113

113-
I2CSlavePort * const I2C_NPM1300 = &I2C_SLAVE_NPM1300;
114+
I2CSlavePort *const I2C_NPM1300 = &I2C_SLAVE_NPM1300;
114115

115116
/* peripheral I2C bus */
116117
static I2CBusState I2C_IIC2_BUS_STATE = {};
117118

118119
static const I2CBusHal I2C_IIC2_BUS_HAL = {
119-
.twim = NRFX_TWIM_INSTANCE(0),
120-
.frequency = NRF_TWIM_FREQ_400K,
120+
.twim = NRFX_TWIM_INSTANCE(0),
121+
.frequency = NRF_TWIM_FREQ_400K,
121122
};
122123

123124
/* FIXME */
124125
static const I2CBus I2C_IIC2_BUS = {
125-
.state = &I2C_IIC2_BUS_STATE,
126-
.hal = &I2C_IIC2_BUS_HAL,
127-
.scl_gpio = {
128-
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
129-
.gpio_pin = NRF_GPIO_PIN_MAP(0, 25),
130-
},
131-
.sda_gpio = {
132-
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
133-
.gpio_pin = NRF_GPIO_PIN_MAP(0, 11),
134-
},
135-
.name = "I2C_IIC2"
126+
.state = &I2C_IIC2_BUS_STATE,
127+
.hal = &I2C_IIC2_BUS_HAL,
128+
.scl_gpio =
129+
{
130+
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
131+
.gpio_pin = NRF_GPIO_PIN_MAP(0, 25),
132+
},
133+
.sda_gpio =
134+
{
135+
.gpio = NRF5_GPIO_RESOURCE_EXISTS,
136+
.gpio_pin = NRF_GPIO_PIN_MAP(0, 11),
137+
},
138+
.name = "I2C_IIC2",
136139
};
137140
IRQ_MAP_NRFX(SPI0_SPIM0_SPIS0_TWI0_TWIM0_TWIS0, nrfx_twim_0_irq_handler);
138141

@@ -147,7 +150,7 @@ IRQ_MAP_NRFX(PWM0, nrfx_pwm_0_irq_handler);
147150

148151
void board_early_init(void) {
149152
PBL_LOG(LOG_LEVEL_ERROR, "asterix early init");
150-
153+
151154
/* shared SPI chip outputs */
152155
nrf_gpio_cfg_output(15);
153156
nrf_gpio_cfg_output(16);

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