Fixed sf32lb boot issues.

Author: gangheivt

src/fw/board/boards/board_em_lb525.c

@@ -56,12 +56,16 @@ static UARTDevice DBG_UART_DEVICE = {.state = &s_dbg_uart_state,
                                      .irq_priority = 1};
 UARTDevice *const DBG_UART = &DBG_UART_DEVICE;
 UARTDevice *const ACCESSORY_UART;  //TODO
+
+#ifdef USING_UART1
 IRQ_MAP(USART1, uart_irq_handler, DBG_UART);
+#else
+IRQ_MAP(USART3, uart_irq_handler, DBG_UART);
+#endif
 
 void DMAC1_CH1_IRQHandler(void) { HAL_DMA_IRQHandler(&s_dbg_uart_rx_dma_handle); }
 
 
-
 I2CBusState i2c1_state;
 I2CBus i2c1 = {
             .hal  = &i2c1_hal_obj,

src/fw/drivers/flash/sf32lb52_int_flash.c

@@ -108,11 +108,12 @@ static int prv_write_nor(uint32_t addr, uint8_t *buf, uint32_t size) {
   uint32_t taddr, start, remain, fill;
   uint8_t *tbuf;
   int res;
+
   __disable_irq();
 
-  HAL_FLASH_SET_WDT(hflash, UINT16_MAX);
   hflash = &spi_flash_handle.handle;
 
+  HAL_FLASH_SET_WDT(hflash, UINT16_MAX);
   if ((addr < hflash->base) || (addr > (hflash->base + hflash->size))) return 0;
 
   taddr = addr - hflash->base;
@@ -143,6 +144,7 @@ static int prv_write_nor(uint32_t addr, uint8_t *buf, uint32_t size) {
   }
 
   __enable_irq();
+  
   return size;
 }
 

src/fw/drivers/sf32lb/stubs/watchdog.c

@@ -25,7 +25,7 @@ McuRebootReason watchdog_clear_reset_flag(void) {
   McuRebootReason mcu_reboot_reason = {
     .brown_out_reset = 0,
     .pin_reset = 0,
-    .power_on_reset = 0,
+    .power_on_reset = 1,
     .software_reset = 0,
     .independent_watchdog_reset = 0,
     .window_watchdog_reset = 0,

src/fw/flash_region/flash_region_sf32lb_int.h

@@ -20,24 +20,42 @@
 #define SHARED_PRF_STORAGE_SIZE (0x001000) /* 4k */
 
 #define FLASH_REGION_FIRMWARE_BASE_ADDRESS (0x12300000) // 3M
-#define FLASH_REGION_FIRMWARE_SCRATCH_BEGIN (FLASH_REGION_FIRMWARE_BASE_ADDRESS)
+
+// 0x12300000
+#define FLASH_REGION_FIRMWARE_SCRATCH_BEGIN (FLASH_REGION_FIRMWARE_BASE_ADDRESS)   
 #define FLASH_REGION_FIRMWARE_SCRATCH_END (FLASH_REGION_FIRMWARE_BASE_ADDRESS + FIRMWARE_SCRATCH_SIZE)
+
+// 0x12500000
 #define FLASH_REGION_SYSTEM_RESOURCES_BANK_0_BEGIN (FLASH_REGION_FIRMWARE_SCRATCH_END)
 #define FLASH_REGION_SYSTEM_RESOURCES_BANK_0_END (FLASH_REGION_SYSTEM_RESOURCES_BANK_0_BEGIN + SYSTEM_RESOURCES_BANK_0_SIZE)
+
+// 0x12600000
 #define FLASH_REGION_SYSTEM_RESOURCES_BANK_1_BEGIN (FLASH_REGION_SYSTEM_RESOURCES_BANK_0_END)
 #define FLASH_REGION_SYSTEM_RESOURCES_BANK_1_END (FLASH_REGION_SYSTEM_RESOURCES_BANK_1_BEGIN + SYSTEM_RESOURCES_BANK_1_SIZE)
+
+// 0x12700000
 #define FLASH_REGION_SAFE_FIRMWARE_BEGIN (FLASH_REGION_SYSTEM_RESOURCES_BANK_1_END)
 #define FLASH_REGION_SAFE_FIRMWARE_END (FLASH_REGION_SAFE_FIRMWARE_BEGIN + SAFE_FIRMWARE_SIZE)
+
+// 0x12780000
 #define FLASH_REGION_DEBUG_DB_BEGIN (FLASH_REGION_SAFE_FIRMWARE_END)
 #define FLASH_REGION_DEBUG_DB_END (FLASH_REGION_DEBUG_DB_BEGIN + DEBUG_DB_SIZE)
 #define FLASH_DEBUG_DB_BLOCK_SIZE SUBSECTOR_SIZE_BYTES
+
+// 0x127A0000
 #define FLASH_REGION_MFG_INFO_BEGIN (FLASH_REGION_DEBUG_DB_END)
 #define FLASH_REGION_MFG_INFO_END (FLASH_REGION_MFG_INFO_BEGIN + MFG_INFO_SIZE)
+
+// 0x127C0000
 #define FLASH_REGION_FILESYSTEM_BEGIN (FLASH_REGION_MFG_INFO_END)
 #define FLASH_REGION_FILESYSTEM_END (FLASH_REGION_FILESYSTEM_BEGIN + FILESYSTEM_SIZE)
 #define FLASH_FILESYSTEM_BLOCK_SIZE SUBSECTOR_SIZE_BYTES
+
+// 0x12FC0000
 #define FLASH_REGION_SHARED_PRF_STORAGE_BEGIN (FLASH_REGION_FILESYSTEM_END)
 #define FLASH_REGION_SHARED_PRF_STORAGE_END (FLASH_REGION_SHARED_PRF_STORAGE_BEGIN + SHARED_PRF_STORAGE_SIZE)
+
+// 0x12FC1000
 #define FLASH_REGION_RSVD_BEGIN (FLASH_REGION_SHARED_PRF_STORAGE_END)
 #define FLASH_REGION_RSVD_END (FLASH_REGION_RSVD_BEGIN + RSVD_SIZE)
 #define FLASH_REGION_SHARED_PRF_STORAGE_SIZE (FLASH_REGION_SHARED_PRF_STORAGE_END - FLASH_REGION_SHARED_PRF_STORAGE_BEGIN)

src/fw/startup/startup_sf32lb.c

@@ -70,13 +70,13 @@ __attribute__((naked)) NORETURN Reset_Handler(void) {
 
   // Copy data section from flash to RAM
   // memcpy(__data_start, __data_load_start, __data_end - __data_start);
-  for (uint32_t i = 0; i < (__data_end - __data_start); i++) {
+  for (int i = 0; i < (__data_end - __data_start); i++) {
     __data_start[i] = __data_load_start[i];
   }
   boot_uart_tx("data copied\n", 12);
 
   // memcpy(__retm_ro_start, __retm_ro_load_start, __retm_ro_end - __retm_ro_start);
-  for (uint32_t i = 0; i < (__retm_ro_end - __retm_ro_start); i++) {
+  for (int i = 0; i < (__retm_ro_end - __retm_ro_start); i++) {
     __retm_ro_start[i] = __retm_ro_load_start[i];
   }
   boot_uart_tx("retm copied\n", 12);

src/fw/wscript

@@ -171,7 +171,7 @@ def _generate_memory_layout(bld):
         # FIXME: The runtime_reserved size could be reduced for diorite
         'diorite': AppRamSize(66 * 1024, 30 * 1024),
         'emery': AppRamSize(130 * 1024, 62 * 1024),
-        'sf32lb': AppRamSize(130 * 1024, 62 * 1024),
+        'sf32lb': AppRamSize(128 * 1024, 64 * 1024),
     }
     APP_UNSUPPORTED = AppRamSize(0, 0)
 
@@ -231,10 +231,11 @@ def _generate_memory_layout(bld):
         retained_size = 256
         total_ram = (0x20000000 + retained_size, 256 * 1024 - retained_size)
     elif bld.is_obelix():
-        app_ram_size_2x = APP_RAM_SIZES['aplite']
-        app_ram_size_3x = APP_RAM_SIZES['basalt']
+        app_ram_size_2x = APP_RAM_SIZES['sf32lb']
+        app_ram_size_3x = APP_RAM_SIZES['aplite']
         app_ram_size_4x = APP_RAM_SIZES['diorite']
-        total_ram = (0x20000000, 512 * 1024)        
+        retained_size = 256
+        total_ram = (0x20000000 + retained_size, 512 * 1024 - retained_size)    
     else:
         bld.fatal("No set of supported SDK platforms defined for this board")