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| 1 | +https://gcc.gnu.org/PR118176 |
| 2 | + |
| 3 | +From ecd031a9470257324484c66b51c6baff943e01ab Mon Sep 17 00:00:00 2001 |
| 4 | +Message-ID: <ecd031a9470257324484c66b51c6baff943e01ab.1734954594.git.sam@gentoo.org> |
| 5 | +From: Christophe Lyon < [email protected]> |
| 6 | +Date: Mon, 23 Dec 2024 08:11:34 +0000 |
| 7 | +Subject: [PATCH] Revert "arm: [MVE intrinsics] Fix support for predicate |
| 8 | + constants [PR target/114801]" |
| 9 | + |
| 10 | +This reverts commit 0631c5770e8162dbe67c73dee0327313c19822c2. |
| 11 | +--- |
| 12 | + gcc/config/arm/arm-mve-builtins.cc | 32 +-------------- |
| 13 | + .../gcc.target/arm/mve/pr108443-run.c | 2 +- |
| 14 | + gcc/testsuite/gcc.target/arm/mve/pr108443.c | 4 +- |
| 15 | + gcc/testsuite/gcc.target/arm/mve/pr114801.c | 39 ------------------- |
| 16 | + 4 files changed, 4 insertions(+), 73 deletions(-) |
| 17 | + delete mode 100644 gcc/testsuite/gcc.target/arm/mve/pr114801.c |
| 18 | + |
| 19 | +diff --git a/gcc/config/arm/arm-mve-builtins.cc b/gcc/config/arm/arm-mve-builtins.cc |
| 20 | +index ec856f7d6168..e1826ae40527 100644 |
| 21 | +--- a/gcc/config/arm/arm-mve-builtins.cc |
| 22 | ++++ b/gcc/config/arm/arm-mve-builtins.cc |
| 23 | +@@ -2107,37 +2107,7 @@ function_expander::add_input_operand (insn_code icode, rtx x) |
| 24 | + mode = GET_MODE (x); |
| 25 | + } |
| 26 | + else if (VALID_MVE_PRED_MODE (mode)) |
| 27 | +- { |
| 28 | +- if (CONST_INT_P (x)) |
| 29 | +- { |
| 30 | +- if (mode == V8BImode || mode == V4BImode) |
| 31 | +- { |
| 32 | +- /* In V8BI or V4BI each element has 2 or 4 bits, if those bits |
| 33 | +- aren't all the same, gen_lowpart might ICE. Canonicalize all |
| 34 | +- the 2 or 4 bits to all ones if any of them is non-zero. V8BI |
| 35 | +- and V4BI multi-bit masks are interpreted byte-by-byte at |
| 36 | +- instruction level, but such constants should describe lanes, |
| 37 | +- rather than bytes. See the section on MVE intrinsics in the |
| 38 | +- Arm ACLE specification. */ |
| 39 | +- unsigned HOST_WIDE_INT xi = UINTVAL (x); |
| 40 | +- xi |= ((xi & 0x5555) << 1) | ((xi & 0xaaaa) >> 1); |
| 41 | +- if (mode == V4BImode) |
| 42 | +- xi |= ((xi & 0x3333) << 2) | ((xi & 0xcccc) >> 2); |
| 43 | +- if (xi != UINTVAL (x)) |
| 44 | +- warning_at (location, 0, "constant predicate argument %d" |
| 45 | +- " (%wx) does not map to %d lane numbers," |
| 46 | +- " converted to %wx", |
| 47 | +- opno, UINTVAL (x) & 0xffff, |
| 48 | +- mode == V8BImode ? 8 : 4, |
| 49 | +- xi & 0xffff); |
| 50 | +- |
| 51 | +- x = gen_int_mode (xi, HImode); |
| 52 | +- } |
| 53 | +- x = gen_lowpart (mode, x); |
| 54 | +- } |
| 55 | +- else |
| 56 | +- x = force_lowpart_subreg (mode, x, GET_MODE (x)); |
| 57 | +- } |
| 58 | ++ x = gen_lowpart (mode, x); |
| 59 | + |
| 60 | + m_ops.safe_grow (m_ops.length () + 1, true); |
| 61 | + create_input_operand (&m_ops.last (), x, mode); |
| 62 | +diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c b/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c |
| 63 | +index b894f019b8bb..cb4b45bd3056 100644 |
| 64 | +--- a/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c |
| 65 | ++++ b/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c |
| 66 | +@@ -16,7 +16,7 @@ __attribute__ ((noipa)) partial_write (uint32_t *a, uint32x4_t v, unsigned short |
| 67 | + |
| 68 | + int main (void) |
| 69 | + { |
| 70 | +- unsigned short p = 0x00FF; |
| 71 | ++ unsigned short p = 0x00CC; |
| 72 | + uint32_t a[] = {0, 0, 0, 0}; |
| 73 | + uint32_t b[] = {0, 0, 0, 0}; |
| 74 | + uint32x4_t v = vdupq_n_u32 (0xFFFFFFFFU); |
| 75 | +diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108443.c b/gcc/testsuite/gcc.target/arm/mve/pr108443.c |
| 76 | +index 0c0e2dd6eb8f..c5fbfa4a1bb7 100644 |
| 77 | +--- a/gcc/testsuite/gcc.target/arm/mve/pr108443.c |
| 78 | ++++ b/gcc/testsuite/gcc.target/arm/mve/pr108443.c |
| 79 | +@@ -7,8 +7,8 @@ |
| 80 | + void |
| 81 | + __attribute__ ((noipa)) partial_write_cst (uint32_t *a, uint32x4_t v) |
| 82 | + { |
| 83 | +- vstrwq_p_u32 (a, v, 0x00FF); |
| 84 | ++ vstrwq_p_u32 (a, v, 0x00CC); |
| 85 | + } |
| 86 | + |
| 87 | +-/* { dg-final { scan-assembler {mov\tr[0-9]+, #255} } } */ |
| 88 | ++/* { dg-final { scan-assembler {mov\tr[0-9]+, #204} } } */ |
| 89 | + |
| 90 | +diff --git a/gcc/testsuite/gcc.target/arm/mve/pr114801.c b/gcc/testsuite/gcc.target/arm/mve/pr114801.c |
| 91 | +deleted file mode 100644 |
| 92 | +index ab3130fd4ce8..000000000000 |
| 93 | +--- a/gcc/testsuite/gcc.target/arm/mve/pr114801.c |
| 94 | ++++ /dev/null |
| 95 | +@@ -1,39 +0,0 @@ |
| 96 | +-/* { dg-do compile } */ |
| 97 | +-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ |
| 98 | +-/* { dg-options "-O2" } */ |
| 99 | +-/* { dg-add-options arm_v8_1m_mve } */ |
| 100 | +-/* { dg-final { check-function-bodies "**" "" "" } } */ |
| 101 | +- |
| 102 | +-#include <arm_mve.h> |
| 103 | +- |
| 104 | +-/* |
| 105 | +-** test_32: |
| 106 | +-**... |
| 107 | +-** mov r[0-9]+, #65295 @ movhi |
| 108 | +-**... |
| 109 | +-*/ |
| 110 | +-uint32x4_t test_32() { |
| 111 | +- /* V4BI predicate converted to 0xff0f. */ |
| 112 | +- return vdupq_m_n_u32(vdupq_n_u32(0xffffffff), 0, 0x4f02); /* { dg-warning {constant predicate argument 3 \(0x4f02\) does not map to 4 lane numbers, converted to 0xff0f} } */ |
| 113 | +-} |
| 114 | +- |
| 115 | +-/* |
| 116 | +-** test_16: |
| 117 | +-**... |
| 118 | +-** mov r[0-9]+, #12339 @ movhi |
| 119 | +-**... |
| 120 | +-*/ |
| 121 | +-uint16x8_t test_16() { |
| 122 | +- /* V8BI predicate converted to 0x3033. */ |
| 123 | +- return vdupq_m_n_u16(vdupq_n_u16(0xffff), 0, 0x3021); /* { dg-warning {constant predicate argument 3 \(0x3021\) does not map to 8 lane numbers, converted to 0x3033} } */ |
| 124 | +-} |
| 125 | +- |
| 126 | +-/* |
| 127 | +-** test_8: |
| 128 | +-**... |
| 129 | +-** mov r[0-9]+, #23055 @ movhi |
| 130 | +-**... |
| 131 | +-*/ |
| 132 | +-uint8x16_t test_8() { |
| 133 | +- return vdupq_m_n_u8(vdupq_n_u8(0xff), 0, 0x5a0f); |
| 134 | +-} |
| 135 | + |
| 136 | +base-commit: e883a7082fecfd85694b275bec4a2e428ac9a081 |
| 137 | +prerequisite-patch-id: 4000f228fd3953eb9877fab7b9493cd86f6bc771 |
| 138 | +prerequisite-patch-id: d61e09af01bb7358c1df6abf5d2c4b7849ab4676 |
| 139 | +prerequisite-patch-id: 54a4cfb376547141937d7e321d7b4554c1e3afe7 |
| 140 | +prerequisite-patch-id: 3117f4e58bd5c0a1aca48af82106bb7f779842fa |
| 141 | +prerequisite-patch-id: a470cf090a6867789c0722d012786c6066d3e706 |
| 142 | +-- |
| 143 | +2.47.1 |
| 144 | + |
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