Skip to content

Commit f68e54b

Browse files
Fix indent of #790
1 parent 677970d commit f68e54b

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

src/analyses/base.ml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -664,7 +664,7 @@ struct
664664
in
665665
let r =
666666
match exp with
667-
| BinOp (op,arg1,arg2,_) when Cil.isIntegralType (Cilfacade.typeOf exp) -> binop op arg1 arg2
667+
| BinOp (op,arg1,arg2,_) when Cil.isIntegralType (Cilfacade.typeOf exp) -> binop op arg1 arg2
668668
| _ -> eval_next ()
669669
in
670670
if M.tracing then M.traceu "evalint" "base eval_rv_ask_mustbeequal %a -> %a\n" d_exp exp VD.pretty r;

0 commit comments

Comments
 (0)