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[RISCV] Remove codegen for vp_fdiv (llvm#190591)
Part of the work to remove trivial VP intrinsics from the RISC-V backend, see https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999 This splits off the vp.fdiv intrinsic from llvm#179622.
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8 files changed

+571
-833
lines changed

8 files changed

+571
-833
lines changed

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -884,7 +884,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
884884

885885
static const unsigned FloatingPointVPOps[] = {
886886
ISD::VP_FADD, ISD::VP_FSUB, ISD::VP_FMUL,
887-
ISD::VP_FDIV, ISD::VP_FNEG, ISD::VP_FABS,
887+
ISD::VP_FNEG, ISD::VP_FABS,
888888
ISD::VP_FMA, ISD::VP_REDUCE_FADD, ISD::VP_REDUCE_SEQ_FADD,
889889
ISD::VP_REDUCE_FMIN, ISD::VP_REDUCE_FMAX, ISD::VP_MERGE,
890890
ISD::VP_SELECT, ISD::VP_SINT_TO_FP, ISD::VP_UINT_TO_FP,
@@ -1208,7 +1208,6 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
12081208
ISD::VP_FADD,
12091209
ISD::VP_FSUB,
12101210
ISD::VP_FMUL,
1211-
ISD::VP_FDIV,
12121211
ISD::VP_FMA,
12131212
ISD::VP_REDUCE_FMIN,
12141213
ISD::VP_REDUCE_FMAX,
@@ -7557,7 +7556,6 @@ static unsigned getRISCVVLOp(SDValue Op) {
75577556
VP_CASE(FADD) // VP_FADD
75587557
VP_CASE(FSUB) // VP_FSUB
75597558
VP_CASE(FMUL) // VP_FMUL
7560-
VP_CASE(FDIV) // VP_FDIV
75617559
VP_CASE(FNEG) // VP_FNEG
75627560
VP_CASE(FABS) // VP_FABS
75637561
VP_CASE(SMIN) // VP_SMIN
@@ -8976,7 +8974,6 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
89768974
case ISD::VP_FADD:
89778975
case ISD::VP_FSUB:
89788976
case ISD::VP_FMUL:
8979-
case ISD::VP_FDIV:
89808977
case ISD::VP_FNEG:
89818978
case ISD::VP_FABS:
89828979
case ISD::VP_SQRT:

‎llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -380,7 +380,6 @@ class RISCVTTIImpl final : public BasicTTIImplBase<RISCVTTIImpl> {
380380
Intrinsic::vp_fabs,
381381
Intrinsic::vp_fadd,
382382
Intrinsic::vp_fcmp,
383-
Intrinsic::vp_fdiv,
384383
Intrinsic::vp_fma,
385384
Intrinsic::vp_fmul,
386385
Intrinsic::vp_fmuladd,

‎llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll‎

Lines changed: 135 additions & 143 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll‎

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -7,8 +7,8 @@
77
define <2 x half> @vfrdiv_vf_v2f16(<2 x half> %va, half %b, <2 x i1> %m, i32 zeroext %evl) {
88
; CHECK-LABEL: vfrdiv_vf_v2f16:
99
; CHECK: # %bb.0:
10-
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
11-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
10+
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
11+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
1212
; CHECK-NEXT: ret
1313
%elt.head = insertelement <2 x half> poison, half %b, i32 0
1414
%vb = shufflevector <2 x half> %elt.head, <2 x half> poison, <2 x i32> zeroinitializer
@@ -19,7 +19,7 @@ define <2 x half> @vfrdiv_vf_v2f16(<2 x half> %va, half %b, <2 x i1> %m, i32 zer
1919
define <2 x half> @vfrdiv_vf_v2f16_unmasked(<2 x half> %va, half %b, i32 zeroext %evl) {
2020
; CHECK-LABEL: vfrdiv_vf_v2f16_unmasked:
2121
; CHECK: # %bb.0:
22-
; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
22+
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
2323
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
2424
; CHECK-NEXT: ret
2525
%elt.head = insertelement <2 x half> poison, half %b, i32 0
@@ -31,8 +31,8 @@ define <2 x half> @vfrdiv_vf_v2f16_unmasked(<2 x half> %va, half %b, i32 zeroext
3131
define <4 x half> @vfrdiv_vf_v4f16(<4 x half> %va, half %b, <4 x i1> %m, i32 zeroext %evl) {
3232
; CHECK-LABEL: vfrdiv_vf_v4f16:
3333
; CHECK: # %bb.0:
34-
; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
35-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
34+
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
35+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
3636
; CHECK-NEXT: ret
3737
%elt.head = insertelement <4 x half> poison, half %b, i32 0
3838
%vb = shufflevector <4 x half> %elt.head, <4 x half> poison, <4 x i32> zeroinitializer
@@ -43,7 +43,7 @@ define <4 x half> @vfrdiv_vf_v4f16(<4 x half> %va, half %b, <4 x i1> %m, i32 zer
4343
define <4 x half> @vfrdiv_vf_v4f16_unmasked(<4 x half> %va, half %b, i32 zeroext %evl) {
4444
; CHECK-LABEL: vfrdiv_vf_v4f16_unmasked:
4545
; CHECK: # %bb.0:
46-
; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
46+
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
4747
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
4848
; CHECK-NEXT: ret
4949
%elt.head = insertelement <4 x half> poison, half %b, i32 0
@@ -55,8 +55,8 @@ define <4 x half> @vfrdiv_vf_v4f16_unmasked(<4 x half> %va, half %b, i32 zeroext
5555
define <8 x half> @vfrdiv_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) {
5656
; CHECK-LABEL: vfrdiv_vf_v8f16:
5757
; CHECK: # %bb.0:
58-
; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma
59-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
58+
; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
59+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
6060
; CHECK-NEXT: ret
6161
%elt.head = insertelement <8 x half> poison, half %b, i32 0
6262
%vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer
@@ -67,7 +67,7 @@ define <8 x half> @vfrdiv_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zer
6767
define <8 x half> @vfrdiv_vf_v8f16_unmasked(<8 x half> %va, half %b, i32 zeroext %evl) {
6868
; CHECK-LABEL: vfrdiv_vf_v8f16_unmasked:
6969
; CHECK: # %bb.0:
70-
; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma
70+
; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
7171
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
7272
; CHECK-NEXT: ret
7373
%elt.head = insertelement <8 x half> poison, half %b, i32 0
@@ -79,8 +79,8 @@ define <8 x half> @vfrdiv_vf_v8f16_unmasked(<8 x half> %va, half %b, i32 zeroext
7979
define <16 x half> @vfrdiv_vf_v16f16(<16 x half> %va, half %b, <16 x i1> %m, i32 zeroext %evl) {
8080
; CHECK-LABEL: vfrdiv_vf_v16f16:
8181
; CHECK: # %bb.0:
82-
; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma
83-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
82+
; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
83+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
8484
; CHECK-NEXT: ret
8585
%elt.head = insertelement <16 x half> poison, half %b, i32 0
8686
%vb = shufflevector <16 x half> %elt.head, <16 x half> poison, <16 x i32> zeroinitializer
@@ -91,7 +91,7 @@ define <16 x half> @vfrdiv_vf_v16f16(<16 x half> %va, half %b, <16 x i1> %m, i32
9191
define <16 x half> @vfrdiv_vf_v16f16_unmasked(<16 x half> %va, half %b, i32 zeroext %evl) {
9292
; CHECK-LABEL: vfrdiv_vf_v16f16_unmasked:
9393
; CHECK: # %bb.0:
94-
; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma
94+
; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
9595
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
9696
; CHECK-NEXT: ret
9797
%elt.head = insertelement <16 x half> poison, half %b, i32 0
@@ -103,8 +103,8 @@ define <16 x half> @vfrdiv_vf_v16f16_unmasked(<16 x half> %va, half %b, i32 zero
103103
define <2 x float> @vfrdiv_vf_v2f32(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
104104
; CHECK-LABEL: vfrdiv_vf_v2f32:
105105
; CHECK: # %bb.0:
106-
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
107-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
106+
; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
107+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
108108
; CHECK-NEXT: ret
109109
%elt.head = insertelement <2 x float> poison, float %b, i32 0
110110
%vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
@@ -115,7 +115,7 @@ define <2 x float> @vfrdiv_vf_v2f32(<2 x float> %va, float %b, <2 x i1> %m, i32
115115
define <2 x float> @vfrdiv_vf_v2f32_unmasked(<2 x float> %va, float %b, i32 zeroext %evl) {
116116
; CHECK-LABEL: vfrdiv_vf_v2f32_unmasked:
117117
; CHECK: # %bb.0:
118-
; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
118+
; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
119119
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
120120
; CHECK-NEXT: ret
121121
%elt.head = insertelement <2 x float> poison, float %b, i32 0
@@ -127,8 +127,8 @@ define <2 x float> @vfrdiv_vf_v2f32_unmasked(<2 x float> %va, float %b, i32 zero
127127
define <4 x float> @vfrdiv_vf_v4f32(<4 x float> %va, float %b, <4 x i1> %m, i32 zeroext %evl) {
128128
; CHECK-LABEL: vfrdiv_vf_v4f32:
129129
; CHECK: # %bb.0:
130-
; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
131-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
130+
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
131+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
132132
; CHECK-NEXT: ret
133133
%elt.head = insertelement <4 x float> poison, float %b, i32 0
134134
%vb = shufflevector <4 x float> %elt.head, <4 x float> poison, <4 x i32> zeroinitializer
@@ -139,7 +139,7 @@ define <4 x float> @vfrdiv_vf_v4f32(<4 x float> %va, float %b, <4 x i1> %m, i32
139139
define <4 x float> @vfrdiv_vf_v4f32_unmasked(<4 x float> %va, float %b, i32 zeroext %evl) {
140140
; CHECK-LABEL: vfrdiv_vf_v4f32_unmasked:
141141
; CHECK: # %bb.0:
142-
; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
142+
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
143143
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
144144
; CHECK-NEXT: ret
145145
%elt.head = insertelement <4 x float> poison, float %b, i32 0
@@ -151,8 +151,8 @@ define <4 x float> @vfrdiv_vf_v4f32_unmasked(<4 x float> %va, float %b, i32 zero
151151
define <8 x float> @vfrdiv_vf_v8f32(<8 x float> %va, float %b, <8 x i1> %m, i32 zeroext %evl) {
152152
; CHECK-LABEL: vfrdiv_vf_v8f32:
153153
; CHECK: # %bb.0:
154-
; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
155-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
154+
; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
155+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
156156
; CHECK-NEXT: ret
157157
%elt.head = insertelement <8 x float> poison, float %b, i32 0
158158
%vb = shufflevector <8 x float> %elt.head, <8 x float> poison, <8 x i32> zeroinitializer
@@ -163,7 +163,7 @@ define <8 x float> @vfrdiv_vf_v8f32(<8 x float> %va, float %b, <8 x i1> %m, i32
163163
define <8 x float> @vfrdiv_vf_v8f32_unmasked(<8 x float> %va, float %b, i32 zeroext %evl) {
164164
; CHECK-LABEL: vfrdiv_vf_v8f32_unmasked:
165165
; CHECK: # %bb.0:
166-
; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
166+
; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
167167
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
168168
; CHECK-NEXT: ret
169169
%elt.head = insertelement <8 x float> poison, float %b, i32 0
@@ -175,8 +175,8 @@ define <8 x float> @vfrdiv_vf_v8f32_unmasked(<8 x float> %va, float %b, i32 zero
175175
define <16 x float> @vfrdiv_vf_v16f32(<16 x float> %va, float %b, <16 x i1> %m, i32 zeroext %evl) {
176176
; CHECK-LABEL: vfrdiv_vf_v16f32:
177177
; CHECK: # %bb.0:
178-
; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
179-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
178+
; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
179+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
180180
; CHECK-NEXT: ret
181181
%elt.head = insertelement <16 x float> poison, float %b, i32 0
182182
%vb = shufflevector <16 x float> %elt.head, <16 x float> poison, <16 x i32> zeroinitializer
@@ -187,7 +187,7 @@ define <16 x float> @vfrdiv_vf_v16f32(<16 x float> %va, float %b, <16 x i1> %m,
187187
define <16 x float> @vfrdiv_vf_v16f32_unmasked(<16 x float> %va, float %b, i32 zeroext %evl) {
188188
; CHECK-LABEL: vfrdiv_vf_v16f32_unmasked:
189189
; CHECK: # %bb.0:
190-
; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
190+
; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
191191
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
192192
; CHECK-NEXT: ret
193193
%elt.head = insertelement <16 x float> poison, float %b, i32 0
@@ -199,8 +199,8 @@ define <16 x float> @vfrdiv_vf_v16f32_unmasked(<16 x float> %va, float %b, i32 z
199199
define <2 x double> @vfrdiv_vf_v2f64(<2 x double> %va, double %b, <2 x i1> %m, i32 zeroext %evl) {
200200
; CHECK-LABEL: vfrdiv_vf_v2f64:
201201
; CHECK: # %bb.0:
202-
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
203-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
202+
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
203+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
204204
; CHECK-NEXT: ret
205205
%elt.head = insertelement <2 x double> poison, double %b, i32 0
206206
%vb = shufflevector <2 x double> %elt.head, <2 x double> poison, <2 x i32> zeroinitializer
@@ -211,7 +211,7 @@ define <2 x double> @vfrdiv_vf_v2f64(<2 x double> %va, double %b, <2 x i1> %m, i
211211
define <2 x double> @vfrdiv_vf_v2f64_unmasked(<2 x double> %va, double %b, i32 zeroext %evl) {
212212
; CHECK-LABEL: vfrdiv_vf_v2f64_unmasked:
213213
; CHECK: # %bb.0:
214-
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
214+
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
215215
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
216216
; CHECK-NEXT: ret
217217
%elt.head = insertelement <2 x double> poison, double %b, i32 0
@@ -223,8 +223,8 @@ define <2 x double> @vfrdiv_vf_v2f64_unmasked(<2 x double> %va, double %b, i32 z
223223
define <4 x double> @vfrdiv_vf_v4f64(<4 x double> %va, double %b, <4 x i1> %m, i32 zeroext %evl) {
224224
; CHECK-LABEL: vfrdiv_vf_v4f64:
225225
; CHECK: # %bb.0:
226-
; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
227-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
226+
; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
227+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
228228
; CHECK-NEXT: ret
229229
%elt.head = insertelement <4 x double> poison, double %b, i32 0
230230
%vb = shufflevector <4 x double> %elt.head, <4 x double> poison, <4 x i32> zeroinitializer
@@ -235,7 +235,7 @@ define <4 x double> @vfrdiv_vf_v4f64(<4 x double> %va, double %b, <4 x i1> %m, i
235235
define <4 x double> @vfrdiv_vf_v4f64_unmasked(<4 x double> %va, double %b, i32 zeroext %evl) {
236236
; CHECK-LABEL: vfrdiv_vf_v4f64_unmasked:
237237
; CHECK: # %bb.0:
238-
; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
238+
; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
239239
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
240240
; CHECK-NEXT: ret
241241
%elt.head = insertelement <4 x double> poison, double %b, i32 0
@@ -247,8 +247,8 @@ define <4 x double> @vfrdiv_vf_v4f64_unmasked(<4 x double> %va, double %b, i32 z
247247
define <8 x double> @vfrdiv_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) {
248248
; CHECK-LABEL: vfrdiv_vf_v8f64:
249249
; CHECK: # %bb.0:
250-
; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
251-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
250+
; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
251+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
252252
; CHECK-NEXT: ret
253253
%elt.head = insertelement <8 x double> poison, double %b, i32 0
254254
%vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer
@@ -259,7 +259,7 @@ define <8 x double> @vfrdiv_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i
259259
define <8 x double> @vfrdiv_vf_v8f64_unmasked(<8 x double> %va, double %b, i32 zeroext %evl) {
260260
; CHECK-LABEL: vfrdiv_vf_v8f64_unmasked:
261261
; CHECK: # %bb.0:
262-
; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
262+
; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
263263
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
264264
; CHECK-NEXT: ret
265265
%elt.head = insertelement <8 x double> poison, double %b, i32 0
@@ -271,8 +271,8 @@ define <8 x double> @vfrdiv_vf_v8f64_unmasked(<8 x double> %va, double %b, i32 z
271271
define <16 x double> @vfrdiv_vf_v16f64(<16 x double> %va, double %b, <16 x i1> %m, i32 zeroext %evl) {
272272
; CHECK-LABEL: vfrdiv_vf_v16f64:
273273
; CHECK: # %bb.0:
274-
; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
275-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
274+
; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma
275+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
276276
; CHECK-NEXT: ret
277277
%elt.head = insertelement <16 x double> poison, double %b, i32 0
278278
%vb = shufflevector <16 x double> %elt.head, <16 x double> poison, <16 x i32> zeroinitializer
@@ -283,7 +283,7 @@ define <16 x double> @vfrdiv_vf_v16f64(<16 x double> %va, double %b, <16 x i1> %
283283
define <16 x double> @vfrdiv_vf_v16f64_unmasked(<16 x double> %va, double %b, i32 zeroext %evl) {
284284
; CHECK-LABEL: vfrdiv_vf_v16f64_unmasked:
285285
; CHECK: # %bb.0:
286-
; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
286+
; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma
287287
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
288288
; CHECK-NEXT: ret
289289
%elt.head = insertelement <16 x double> poison, double %b, i32 0

‎llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll‎

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -3643,18 +3643,16 @@ for.cond.cleanup: ; preds = %vector.body
36433643
define void @sink_splat_vp_fdiv(ptr nocapture %a, float %x, <4 x i1> %m, i32 zeroext %vl) {
36443644
; CHECK-LABEL: sink_splat_vp_fdiv:
36453645
; CHECK: # %bb.0: # %entry
3646-
; CHECK-NEXT: lui a2, 1
3647-
; CHECK-NEXT: add a2, a0, a2
3646+
; CHECK-NEXT: lui a1, 1
3647+
; CHECK-NEXT: add a1, a0, a1
36483648
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
36493649
; CHECK-NEXT: .LBB69_1: # %vector.body
36503650
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
36513651
; CHECK-NEXT: vle32.v v8, (a0)
3652-
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
3653-
; CHECK-NEXT: vfdiv.vf v8, v8, fa0, v0.t
3654-
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
3652+
; CHECK-NEXT: vfdiv.vf v8, v8, fa0
36553653
; CHECK-NEXT: vse32.v v8, (a0)
36563654
; CHECK-NEXT: addi a0, a0, 16
3657-
; CHECK-NEXT: bne a0, a2, .LBB69_1
3655+
; CHECK-NEXT: bne a0, a1, .LBB69_1
36583656
; CHECK-NEXT: # %bb.2: # %for.cond.cleanup
36593657
; CHECK-NEXT: ret
36603658
entry:
@@ -3679,18 +3677,16 @@ for.cond.cleanup: ; preds = %vector.body
36793677
define void @sink_splat_vp_frdiv(ptr nocapture %a, float %x, <4 x i1> %m, i32 zeroext %vl) {
36803678
; CHECK-LABEL: sink_splat_vp_frdiv:
36813679
; CHECK: # %bb.0: # %entry
3682-
; CHECK-NEXT: lui a2, 1
3683-
; CHECK-NEXT: add a2, a0, a2
3680+
; CHECK-NEXT: lui a1, 1
3681+
; CHECK-NEXT: add a1, a0, a1
36843682
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
36853683
; CHECK-NEXT: .LBB70_1: # %vector.body
36863684
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
36873685
; CHECK-NEXT: vle32.v v8, (a0)
3688-
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
3689-
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0, v0.t
3690-
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
3686+
; CHECK-NEXT: vfrdiv.vf v8, v8, fa0
36913687
; CHECK-NEXT: vse32.v v8, (a0)
36923688
; CHECK-NEXT: addi a0, a0, 16
3693-
; CHECK-NEXT: bne a0, a2, .LBB70_1
3689+
; CHECK-NEXT: bne a0, a1, .LBB70_1
36943690
; CHECK-NEXT: # %bb.2: # %for.cond.cleanup
36953691
; CHECK-NEXT: ret
36963692
entry:

‎llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -297,6 +297,8 @@ define <4 x float> @vfmul_v4f32_false_mask(<4 x float> %va, <4 x float> %vb, i32
297297
define <4 x float> @vfdiv_v4f32_zero_evl(<4 x float> %va, <4 x float> %vb, <4 x i1> %m) {
298298
; CHECK-LABEL: vfdiv_v4f32_zero_evl:
299299
; CHECK: # %bb.0:
300+
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
301+
; CHECK-NEXT: vfdiv.vv v8, v8, v9
300302
; CHECK-NEXT: ret
301303
%s = call <4 x float> @llvm.vp.fdiv.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> %m, i32 0)
302304
ret <4 x float> %s
@@ -305,6 +307,8 @@ define <4 x float> @vfdiv_v4f32_zero_evl(<4 x float> %va, <4 x float> %vb, <4 x
305307
define <4 x float> @vfdiv_v4f32_false_mask(<4 x float> %va, <4 x float> %vb, i32 %evl) {
306308
; CHECK-LABEL: vfdiv_v4f32_false_mask:
307309
; CHECK: # %bb.0:
310+
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
311+
; CHECK-NEXT: vfdiv.vv v8, v8, v9
308312
; CHECK-NEXT: ret
309313
%s = call <4 x float> @llvm.vp.fdiv.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> zeroinitializer, i32 %evl)
310314
ret <4 x float> %s

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