Add code generation tests

Introduces a suite of code generation tests to the `benches` folder.
Each tests consists of a pair of files: a Rust source containing a
function named `codegen_test`, and a `.x86-64.mca` file containing
the llvm-mca analysis of `codegen_test`. In practice, these tests
operate similarly to UI tests; CI checks a fresh llvm-mca analysis
against that in the file, and fails if they mismatch. Changes can
be expressly blessed via `BLESS=1`.

gherrit-pr-id: G5964d13c9ffb7a47ed4662892ef92c90ddc51e12

Author: jswrenn

.github/workflows/ci.yml

@@ -379,7 +379,8 @@ jobs:
           $FEATURES \
           --verbose \
           -- \
-          --skip ui
+          --skip ui \
+          --skip codegen
 
       # Only run tests when targetting Linux x86 (32- or 64-bit) - we're
       # executing on Linux x86_64, so we can't run tests for any non-x86 target.
@@ -388,6 +389,23 @@ jobs:
       # Run compile tests when building for other targets.
       if: contains(matrix.target, 'linux') && (contains(matrix.target, 'x86_64') || contains(matrix.target, 'i686'))
 
+    - name: Run codegen tests
+      env:
+        TOOLCHAIN: ${{ matrix.toolchain }}
+        CRATE: ${{ matrix.crate }}
+        TARGET: ${{ matrix.target }}
+        FEATURES: ${{ matrix.features }}
+      run: |
+        sudo apt install llvm > /dev/null
+        ./cargo.sh +nightly install cargo-show-asm > /dev/null
+        ./cargo.sh +$TOOLCHAIN test \
+          --package $CRATE \
+          --target $TARGET \
+          $FEATURES \
+          --verbose \
+          --test codegen
+      if: matrix.crate == 'zerocopy' && matrix.toolchain == 'nightly' && matrix.target == 'x86_64-unknown-linux-gnu' && matrix.features == '--all-features'
+
     - name: Run UI tests
       env:
         TOOLCHAIN: ${{ matrix.toolchain }}
@@ -631,7 +649,9 @@ jobs:
             --lcov \
             --output-path lcov.info \
             --verbose \
-            -- --skip ui
+            -- \
+            --skip ui \
+            --skip codegen
       - name: Upload coverage to Codecov
         uses: codecov/codecov-action@671740ac38dd9b0130fbe1cec585b89eea48d3de # v5.5.2
         with:

benches/formats/coco.rs

@@ -0,0 +1,30 @@
+// Copyright 2026 The Fuchsia Authors
+//
+// Licensed under a BSD-style license <LICENSE-BSD>, Apache License, Version 2.0
+// <LICENSE-APACHE or https://www.apache.org/licenses/LICENSE-2.0>, or the MIT
+// license <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your option.
+// This file may not be copied, modified, or distributed except according to
+// those terms.
+
+use zerocopy_derive::*;
+
+// The only valid value of this type is the byte `0xC0`
+#[derive(TryFromBytes, KnownLayout, Immutable)]
+#[repr(u8)]
+enum C0 {
+    _XC0 = 0xC0,
+}
+
+// The only valid value of this type is the bytes `0xC0C0`.
+#[derive(TryFromBytes, KnownLayout, Immutable)]
+#[repr(C)]
+struct C0C0(C0, C0);
+
+#[derive(TryFromBytes, KnownLayout, Immutable)]
+#[repr(C)]
+pub struct Packet {
+    magic_number: C0C0,
+    mug_size: u8,
+    temperature: u8,
+    marshmallows: [[u8; 2]],
+}

benches/formats/loco.rs

@@ -0,0 +1,18 @@
+// Copyright 2026 The Fuchsia Authors
+//
+// Licensed under a BSD-style license <LICENSE-BSD>, Apache License, Version 2.0
+// <LICENSE-APACHE or https://www.apache.org/licenses/LICENSE-2.0>, or the MIT
+// license <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your option.
+// This file may not be copied, modified, or distributed except according to
+// those terms.
+
+use zerocopy_derive::*;
+
+#[derive(FromBytes, KnownLayout, Immutable)]
+#[repr(C)]
+pub struct Packet {
+    magic_number: [u8; 2],
+    mug_size: u8,
+    temperature: u8,
+    marshmallows: [[u8; 2]],
+}

benches/ref_from_bytes.rs

@@ -0,0 +1,17 @@
+// Copyright 2026 The Fuchsia Authors
+//
+// Licensed under a BSD-style license <LICENSE-BSD>, Apache License, Version 2.0
+// <LICENSE-APACHE or https://www.apache.org/licenses/LICENSE-2.0>, or the MIT
+// license <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your option.
+// This file may not be copied, modified, or distributed except according to
+// those terms.
+
+use zerocopy::FromBytes;
+
+#[path = "formats/loco.rs"]
+mod loco;
+
+#[unsafe(no_mangle)]
+fn codegen_test(source: &[u8]) -> Option<&loco::Packet> {
+    FromBytes::ref_from_bytes(source).ok()
+}

benches/ref_from_bytes.x86-64.mca

@@ -0,0 +1,69 @@
+Iterations:        100
+Instructions:      1500
+Total Cycles:      699
+Total uOps:        1700
+
+Dispatch Width:    4
+uOps Per Cycle:    2.43
+IPC:               2.15
+Block RThroughput: 4.3
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rdx, rsi
+ 1      1     0.33                        cmp	rsi, 4
+ 1      1     1.00                        jae	.LBB5_2
+ 1      0     0.25                        xor	eax, eax
+ 1      1     1.00                  U     ret
+ 1      1     0.50                        lea	rcx, [rdx - 4]
+ 1      1     0.33                        mov	rsi, rcx
+ 1      1     0.33                        and	rsi, -2
+ 1      1     0.33                        add	rsi, 4
+ 1      1     0.50                        shr	rcx
+ 1      0     0.25                        xor	eax, eax
+ 1      1     0.33                        cmp	rdx, rsi
+ 2      2     0.67                        cmove	rdx, rcx
+ 2      2     0.67                        cmove	rax, rdi
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     4.96   4.99    -     5.05    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.94   0.04    -     0.02    -      -     mov	rdx, rsi
+ -      -     0.01   0.02    -     0.97    -      -     cmp	rsi, 4
+ -      -      -      -      -     1.00    -      -     jae	.LBB5_2
+ -      -      -      -      -      -      -      -     xor	eax, eax
+ -      -      -      -      -     1.00    -      -     ret
+ -      -     0.92   0.08    -      -      -      -     lea	rcx, [rdx - 4]
+ -      -     0.06   0.92    -     0.02    -      -     mov	rsi, rcx
+ -      -     0.01   0.12    -     0.87    -      -     and	rsi, -2
+ -      -     0.06   0.91    -     0.03    -      -     add	rsi, 4
+ -      -     0.95    -      -     0.05    -      -     shr	rcx
+ -      -      -      -      -      -      -      -     xor	eax, eax
+ -      -     0.04   0.94    -     0.02    -      -     cmp	rdx, rsi
+ -      -     0.99   0.98    -     0.03    -      -     cmove	rdx, rcx
+ -      -     0.98   0.98    -     0.04    -      -     cmove	rax, rdi
+ -      -      -      -      -     1.00    -      -     ret

benches/ref_from_bytes_with_elems.rs

@@ -0,0 +1,17 @@
+// Copyright 2026 The Fuchsia Authors
+//
+// Licensed under a BSD-style license <LICENSE-BSD>, Apache License, Version 2.0
+// <LICENSE-APACHE or https://www.apache.org/licenses/LICENSE-2.0>, or the MIT
+// license <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your option.
+// This file may not be copied, modified, or distributed except according to
+// those terms.
+
+use zerocopy::FromBytes;
+
+#[path = "formats/loco.rs"]
+mod loco;
+
+#[unsafe(no_mangle)]
+fn codegen_test(source: &[u8], count: usize) -> Option<&loco::Packet> {
+    FromBytes::ref_from_bytes_with_elems(source, count).ok()
+}

benches/ref_from_bytes_with_elems.x86-64.mca

@@ -0,0 +1,65 @@
+Iterations:        100
+Instructions:      1300
+Total Cycles:      504
+Total uOps:        1500
+
+Dispatch Width:    4
+uOps Per Cycle:    2.98
+IPC:               2.58
+Block RThroughput: 3.8
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rcx, rdx
+ 1      1     0.33                        mov	rdx, rsi
+ 1      1     0.33                        movabs	rax, 9223372036854775805
+ 1      1     0.33                        cmp	rcx, rax
+ 1      1     1.00                        ja	.LBB5_1
+ 1      1     0.50                        lea	rsi, [2*rcx + 4]
+ 1      0     0.25                        xor	eax, eax
+ 1      1     0.33                        cmp	rdx, rsi
+ 2      2     0.67                        cmove	rdx, rcx
+ 2      2     0.67                        cmove	rax, rdi
+ 1      1     1.00                  U     ret
+ 1      0     0.25                        xor	eax, eax
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     4.09   4.10    -     4.81    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.04   0.94    -     0.02    -      -     mov	rcx, rdx
+ -      -     0.17   0.83    -      -      -      -     mov	rdx, rsi
+ -      -     0.19   0.79    -     0.02    -      -     movabs	rax, 9223372036854775805
+ -      -     0.75   0.18    -     0.07    -      -     cmp	rcx, rax
+ -      -      -      -      -     1.00    -      -     ja	.LBB5_1
+ -      -     0.18   0.82    -      -      -      -     lea	rsi, [2*rcx + 4]
+ -      -      -      -      -      -      -      -     xor	eax, eax
+ -      -     0.82   0.18    -      -      -      -     cmp	rdx, rsi
+ -      -     0.97   0.17    -     0.86    -      -     cmove	rdx, rcx
+ -      -     0.97   0.19    -     0.84    -      -     cmove	rax, rdi
+ -      -      -      -      -     1.00    -      -     ret
+ -      -      -      -      -      -      -      -     xor	eax, eax
+ -      -      -      -      -     1.00    -      -     ret

benches/ref_from_prefix.rs

@@ -0,0 +1,20 @@
+// Copyright 2026 The Fuchsia Authors
+//
+// Licensed under a BSD-style license <LICENSE-BSD>, Apache License, Version 2.0
+// <LICENSE-APACHE or https://www.apache.org/licenses/LICENSE-2.0>, or the MIT
+// license <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your option.
+// This file may not be copied, modified, or distributed except according to
+// those terms.
+
+use zerocopy::FromBytes;
+
+#[path = "formats/loco.rs"]
+mod loco;
+
+#[unsafe(no_mangle)]
+fn codegen_test(source: &[u8]) -> Option<&loco::Packet> {
+    match FromBytes::ref_from_prefix(source) {
+        Ok((packet, _rest)) => Some(packet),
+        _ => None,
+    }
+}

benches/ref_from_prefix.x86-64.mca

@@ -0,0 +1,51 @@
+Iterations:        100
+Instructions:      600
+Total Cycles:      206
+Total uOps:        700
+
+Dispatch Width:    4
+uOps Per Cycle:    3.40
+IPC:               2.91
+Block RThroughput: 1.8
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rdx, rsi
+ 1      0     0.25                        xor	eax, eax
+ 1      1     0.33                        sub	rdx, 4
+ 2      2     0.67                        cmovae	rax, rdi
+ 1      1     0.50                        shr	rdx
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     1.99   2.00    -     2.01    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.99    -      -     0.01    -      -     mov	rdx, rsi
+ -      -      -      -      -      -      -      -     xor	eax, eax
+ -      -      -     1.00    -      -      -      -     sub	rdx, 4
+ -      -     0.02   1.00    -     0.98    -      -     cmovae	rax, rdi
+ -      -     0.98    -      -     0.02    -      -     shr	rdx
+ -      -      -      -      -     1.00    -      -     ret

benches/ref_from_prefix_with_elems.rs

@@ -0,0 +1,20 @@
+// Copyright 2026 The Fuchsia Authors
+//
+// Licensed under a BSD-style license <LICENSE-BSD>, Apache License, Version 2.0
+// <LICENSE-APACHE or https://www.apache.org/licenses/LICENSE-2.0>, or the MIT
+// license <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your option.
+// This file may not be copied, modified, or distributed except according to
+// those terms.
+
+use zerocopy::FromBytes;
+
+#[path = "formats/loco.rs"]
+mod loco;
+
+#[unsafe(no_mangle)]
+fn codegen_test(source: &[u8], count: usize) -> Option<&loco::Packet> {
+    match FromBytes::ref_from_prefix_with_elems(source, count) {
+        Ok((packet, _rest)) => Some(packet),
+        _ => None,
+    }
+}