Merge pull request #3367 from hathach/n6_build

Fix STM32N6 IAR build

Author: hathach

examples/build_system/cmake/cpu/cortex-m55.cmake

@@ -13,13 +13,15 @@ elseif (TOOLCHAIN STREQUAL "clang")
     --target=arm-none-eabi
     -mcpu=cortex-m55
     -mfpu=fpv5-d16
+    -mcmse
     )
   set(FREERTOS_PORT GCC_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "")
 
 elseif (TOOLCHAIN STREQUAL "iar")
   set(TOOLCHAIN_COMMON_FLAGS
     --cpu cortex-m55
     --fpu VFPv5_D16
+    --cmse
     )
   set(FREERTOS_PORT IAR_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "")
 

hw/bsp/stm32n6/family.cmake

@@ -44,11 +44,11 @@ set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 if(NOT DEFINED LD_FILE_GNU)
-set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash.ld)
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_axisram2_fsbl.ld)
 endif()
 set(LD_FILE_Clang ${LD_FILE_GNU})
 if(NOT DEFINED LD_FILE_IAR)
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_axisram2_fsbl.icf)
 endif()
 
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