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hathachhathach
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Merge pull request #2588 from hathach/support-ra2a1
Enhance dcd rusb2, support ra2a1 pipe number scheme
2 parents fb21b6a + 6328301 commit 50738f2

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5 files changed

+102
-131
lines changed

5 files changed

+102
-131
lines changed

‎hw/bsp/ra/boards/ra2a1_ek/board.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,10 +31,10 @@
3131
extern "C" {
3232
#endif
3333

34-
#define LED1 BSP_IO_PORT_01_PIN_06
34+
#define LED1 BSP_IO_PORT_02_PIN_05
3535
#define LED_STATE_ON 1
3636

37-
#define SW1 BSP_IO_PORT_01_PIN_05
37+
#define SW1 BSP_IO_PORT_02_PIN_06
3838
#define BUTTON_STATE_ACTIVE 0
3939

4040
static const ioport_pin_cfg_t board_pin_cfg[] = {

‎hw/bsp/ra/family.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,8 +64,11 @@ BSP_DONT_REMOVE BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS)
6464
const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] = {
6565
[0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
6666
[1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */
67+
68+
#ifndef BSP_MCU_GROUP_RA2A1
6769
[2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */
6870
[3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */
71+
#endif
6972

7073
#ifdef BOARD_HAS_USB_HIGHSPEED
7174
[4] = usbhs_interrupt_handler, /* USBHS INT (USBHS interrupt) */

‎hw/bsp/ra/vector_data.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,11 @@ extern "C" {
99
/* ISR prototypes */
1010
void usbfs_interrupt_handler(void);
1111
void usbfs_resume_handler(void);
12+
13+
#ifndef BSP_MCU_GROUP_RA2A1
1214
void usbfs_d0fifo_handler(void);
1315
void usbfs_d1fifo_handler(void);
16+
#endif
1417

1518
#ifdef BOARD_HAS_USB_HIGHSPEED
1619
void usbhs_interrupt_handler(void);

‎src/portable/renesas/rusb2/dcd_rusb2.c

Lines changed: 57 additions & 75 deletions
Original file line numberDiff line numberDiff line change
@@ -57,29 +57,22 @@
5757
//--------------------------------------------------------------------+
5858
// MACRO TYPEDEF CONSTANT ENUM
5959
//--------------------------------------------------------------------+
60+
enum {
61+
PIPE_COUNT = 10,
62+
};
6063

61-
/* Start of definition of packed structs (used by the CCRX toolchain) */
62-
TU_ATTR_PACKED_BEGIN
63-
TU_ATTR_BIT_FIELD_ORDER_BEGIN
64-
65-
typedef struct TU_ATTR_PACKED
66-
{
64+
typedef struct {
6765
void *buf; /* the start address of a transfer data buffer */
6866
uint16_t length; /* the number of bytes in the buffer */
6967
uint16_t remaining; /* the number of bytes remaining in the buffer */
70-
struct {
71-
uint32_t ep : 8; /* an assigned endpoint address */
72-
uint32_t ff : 1; /* `buf` is TU_FUFO or POD */
73-
uint32_t : 0;
74-
};
75-
} pipe_state_t;
7668

77-
TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain)
78-
TU_ATTR_BIT_FIELD_ORDER_END
69+
uint8_t ep; /* an assigned endpoint address */
70+
uint8_t ff; /* `buf` is TU_FUFO or POD */
71+
} pipe_state_t;
7972

8073
typedef struct
8174
{
82-
pipe_state_t pipe[10];
75+
pipe_state_t pipe[PIPE_COUNT];
8376
uint8_t ep[2][16]; /* a lookup table for a pipe index from an endpoint address */
8477
} dcd_data_t;
8578

@@ -89,70 +82,60 @@ static dcd_data_t _dcd;
8982
// INTERNAL OBJECT & FUNCTION DECLARATION
9083
//--------------------------------------------------------------------+
9184

92-
// Transfer conditions specifiable for each pipe:
93-
// - Pipe 0: Control transfer with 64-byte single buffer
94-
// - Pipes 1 and 2: Bulk isochronous transfer continuous transfer mode with programmable buffer size up
95-
// to 2 KB and optional double buffer
96-
// - Pipes 3 to 5: Bulk transfer continuous transfer mode with programmable buffer size up to 2 KB and
97-
// optional double buffer
98-
// - Pipes 6 to 9: Interrupt transfer with 64-byte single buffer
99-
enum {
100-
PIPE_1ST_BULK = 3,
101-
PIPE_1ST_INTERRUPT = 6,
102-
PIPE_COUNT = 10,
103-
};
104-
105-
static unsigned find_pipe(unsigned xfer)
106-
{
107-
switch (xfer) {
108-
case TUSB_XFER_ISOCHRONOUS:
109-
for (int i = 1; i < PIPE_1ST_BULK; ++i) {
110-
if (0 == _dcd.pipe[i].ep) return i;
111-
}
112-
break;
11385

114-
case TUSB_XFER_BULK:
115-
for (int i = PIPE_1ST_BULK; i < PIPE_1ST_INTERRUPT; ++i) {
116-
if (0 == _dcd.pipe[i].ep) return i;
117-
}
118-
for (int i = 1; i < PIPE_1ST_BULK; ++i) {
119-
if (0 == _dcd.pipe[i].ep) return i;
120-
}
121-
break;
86+
// Transfer conditions specifiable for each pipe for most MCUs
87+
// - Pipe 0: Control transfer with 64-byte single buffer
88+
// - Pipes 1 and 2: Bulk or ISO
89+
// - Pipes 3 to 5: Bulk
90+
// - Pipes 6 to 9: Interrupt
91+
//
92+
// Note: for small mcu such as
93+
// - RA2A1: only pipe 4-7 are available, and no support for ISO
94+
static unsigned find_pipe(unsigned xfer_type) {
95+
#if defined(BSP_MCU_GROUP_RA2A1)
96+
const uint8_t pipe_idx_arr[4][2] = {
97+
{ 0, 0 }, // Control
98+
{ 0, 0 }, // Isochronous not supported
99+
{ 4, 5 }, // Bulk
100+
{ 6, 7 }, // Interrupt
101+
};
102+
#else
103+
const uint8_t pipe_idx_arr[4][2] = {
104+
{ 0, 0 }, // Control
105+
{ 1, 2 }, // Isochronous
106+
{ 1, 5 }, // Bulk
107+
{ 6, 9 }, // Interrupt
108+
};
109+
#endif
122110

123-
case TUSB_XFER_INTERRUPT:
124-
for (int i = PIPE_1ST_INTERRUPT; i < PIPE_COUNT; ++i) {
125-
if (0 == _dcd.pipe[i].ep) return i;
126-
}
127-
break;
111+
// find backward since only pipe 1, 2 support ISO
112+
const uint8_t idx_first = pipe_idx_arr[xfer_type][0];
113+
const uint8_t idx_last = pipe_idx_arr[xfer_type][1];
128114

129-
default:
130-
/* No support for control transfer */
131-
break;
115+
for (int i = idx_last; i >= idx_first; i--) {
116+
if (0 == _dcd.pipe[i].ep) return i;
132117
}
118+
133119
return 0;
134120
}
135121

136-
static volatile uint16_t* get_pipectr(rusb2_reg_t *rusb, unsigned num)
137-
{
122+
static volatile uint16_t* get_pipectr(rusb2_reg_t *rusb, unsigned num) {
138123
if (num) {
139124
return (volatile uint16_t*)&(rusb->PIPE_CTR[num - 1]);
140125
} else {
141126
return (volatile uint16_t*)&(rusb->DCPCTR);
142127
}
143128
}
144129

145-
static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num)
146-
{
130+
static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num) {
147131
volatile reg_pipetre_t* tre = NULL;
148132
if ((1 <= num) && (num <= 5)) {
149133
tre = (volatile reg_pipetre_t*)&(rusb->PIPE_TR[num - 1].E);
150134
}
151135
return tre;
152136
}
153137

154-
static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
155-
{
138+
static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr) {
156139
rusb2_reg_t *rusb = RUSB2_REG(rhport);
157140
const unsigned epn = tu_edpt_number(ep_addr);
158141

@@ -165,19 +148,16 @@ static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
165148
}
166149
}
167150

168-
static uint16_t edpt0_max_packet_size(rusb2_reg_t* rusb)
169-
{
151+
static uint16_t edpt0_max_packet_size(rusb2_reg_t* rusb) {
170152
return rusb->DCPMAXP_b.MXPS;
171153
}
172154

173-
static uint16_t edpt_max_packet_size(rusb2_reg_t *rusb, unsigned num)
174-
{
155+
static uint16_t edpt_max_packet_size(rusb2_reg_t *rusb, unsigned num) {
175156
rusb->PIPESEL = num;
176157
return rusb->PIPEMAXP;
177158
}
178159

179-
static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num)
180-
{
160+
static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num) {
181161
while ( rusb->D0FIFOSEL_b.CURPIPE != num ) {}
182162
while ( !rusb->D0FIFOCTR_b.FRDY ) {}
183163
}
@@ -835,7 +815,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
835815
}
836816

837817
rusb->PIPECFG = cfg;
838-
rusb->BRDYSTS = 0x1FFu ^ TU_BIT(num);
818+
rusb->BRDYSTS = 0x3FFu ^ TU_BIT(num);
839819
rusb->BRDYENB |= TU_BIT(num);
840820

841821
if (dir || (xfer != TUSB_XFER_BULK)) {
@@ -935,6 +915,18 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
935915
//--------------------------------------------------------------------+
936916
// ISR
937917
//--------------------------------------------------------------------+
918+
919+
#if defined(__CCRX__)
920+
TU_ATTR_ALWAYS_INLINE static inline unsigned __builtin_ctz(unsigned int value) {
921+
unsigned int count = 0;
922+
while ((value & 1) == 0) {
923+
value >>= 1;
924+
count++;
925+
}
926+
return count;
927+
}
928+
#endif
929+
938930
void dcd_int_handler(uint8_t rhport)
939931
{
940932
rusb2_reg_t* rusb = RUSB2_REG(rhport);
@@ -1026,17 +1018,7 @@ void dcd_int_handler(uint8_t rhport)
10261018
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
10271019
rusb->BRDYSTS = ~s;
10281020
while (s) {
1029-
#if defined(__CCRX__)
1030-
static const int Mod37BitPosition[] = {
1031-
-1, 0, 1, 26, 2, 23, 27, 0, 3, 16, 24, 30, 28, 11, 0, 13, 4,
1032-
7, 17, 0, 25, 22, 31, 15, 29, 10, 12, 6, 0, 21, 14, 9, 5,
1033-
20, 8, 19, 18
1034-
};
1035-
1036-
const unsigned num = Mod37BitPosition[(-s & s) % 37];
1037-
#else
10381021
const unsigned num = __builtin_ctz(s);
1039-
#endif
10401022
process_pipe_brdy(rhport, num);
10411023
s &= ~TU_BIT(num);
10421024
}

‎src/portable/renesas/rusb2/hcd_rusb2.c

Lines changed: 37 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,9 @@
4545
//--------------------------------------------------------------------+
4646
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
4747
//--------------------------------------------------------------------+
48+
enum {
49+
PIPE_COUNT = 10,
50+
};
4851

4952
TU_ATTR_PACKED_BEGIN
5053
TU_ATTR_BIT_FIELD_ORDER_BEGIN
@@ -75,7 +78,7 @@ TU_ATTR_BIT_FIELD_ORDER_END
7578
typedef struct
7679
{
7780
bool need_reset; /* The device has not been reset after connection. */
78-
pipe_state_t pipe[10];
81+
pipe_state_t pipe[PIPE_COUNT];
7982
uint8_t ep[4][2][15]; /* a lookup table for a pipe index from an endpoint address */
8083
uint8_t ctl_mps[5]; /* EP0 max packet size for each device */
8184
} hcd_data_t;
@@ -86,46 +89,30 @@ typedef struct
8689
static hcd_data_t _hcd;
8790

8891
// TODO merged with DCD
89-
// Transfer conditions specifiable for each pipe:
92+
// Transfer conditions specifiable for each pipe for most MCUs
9093
// - Pipe 0: Control transfer with 64-byte single buffer
91-
// - Pipes 1 and 2: Bulk isochronous transfer continuous transfer mode with programmable buffer size up
92-
// to 2 KB and optional double buffer
93-
// - Pipes 3 to 5: Bulk transfer continuous transfer mode with programmable buffer size up to 2 KB and
94-
// optional double buffer
95-
// - Pipes 6 to 9: Interrupt transfer with 64-byte single buffer
96-
enum {
97-
PIPE_1ST_BULK = 3,
98-
PIPE_1ST_INTERRUPT = 6,
99-
PIPE_COUNT = 10,
100-
};
94+
// - Pipes 1 and 2: Bulk or ISO
95+
// - Pipes 3 to 5: Bulk
96+
// - Pipes 6 to 9: Interrupt
97+
//
98+
// Note: for small mcu such as
99+
// - RA2A1: only pipe 4-7 are available, and no support for ISO
100+
static unsigned find_pipe(unsigned xfer_type) {
101+
const uint8_t pipe_idx_arr[4][2] = {
102+
{ 0, 0 }, // Control
103+
{ 1, 2 }, // Isochronous
104+
{ 1, 5 }, // Bulk
105+
{ 6, 9 }, // Interrupt
106+
};
107+
108+
// find backward since only pipe 1, 2 support ISO
109+
const uint8_t idx_first = pipe_idx_arr[xfer_type][0];
110+
const uint8_t idx_last = pipe_idx_arr[xfer_type][1];
101111

102-
static unsigned find_pipe(unsigned xfer) {
103-
switch ( xfer ) {
104-
case TUSB_XFER_ISOCHRONOUS:
105-
for (int i = 1; i < PIPE_1ST_BULK; ++i) {
106-
if ( 0 == _hcd.pipe[i].ep ) return i;
107-
}
108-
break;
109-
110-
case TUSB_XFER_BULK:
111-
for (int i = PIPE_1ST_BULK; i < PIPE_1ST_INTERRUPT; ++i) {
112-
if ( 0 == _hcd.pipe[i].ep ) return i;
113-
}
114-
for (int i = 1; i < PIPE_1ST_BULK; ++i) {
115-
if ( 0 == _hcd.pipe[i].ep ) return i;
116-
}
117-
break;
118-
119-
case TUSB_XFER_INTERRUPT:
120-
for (int i = PIPE_1ST_INTERRUPT; i < PIPE_COUNT; ++i) {
121-
if ( 0 == _hcd.pipe[i].ep ) return i;
122-
}
123-
break;
124-
125-
default:
126-
/* No support for control transfer */
127-
break;
112+
for (int i = idx_last; i >= idx_first; i--) {
113+
if (0 == _hcd.pipe[i].ep) return i;
128114
}
115+
129116
return 0;
130117
}
131118

@@ -718,7 +705,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
718705
}
719706

720707
rusb->PIPECFG = cfg;
721-
rusb->BRDYSTS = 0x1FFu ^ TU_BIT(num);
708+
rusb->BRDYSTS = 0x3FFu ^ TU_BIT(num);
722709
rusb->NRDYENB |= TU_BIT(num);
723710
rusb->BRDYENB |= TU_BIT(num);
724711

@@ -771,6 +758,17 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
771758
//--------------------------------------------------------------------+
772759
// ISR
773760
//--------------------------------------------------------------------+
761+
#if defined(__CCRX__)
762+
TU_ATTR_ALWAYS_INLINE static inline unsigned __builtin_ctz(unsigned int value) {
763+
unsigned int count = 0;
764+
while ((value & 1) == 0) {
765+
value >>= 1;
766+
count++;
767+
}
768+
return count;
769+
}
770+
#endif
771+
774772
void hcd_int_handler(uint8_t rhport, bool in_isr) {
775773
(void) in_isr;
776774

@@ -820,23 +818,12 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
820818
}
821819
}
822820

823-
#if defined(__CCRX__)
824-
static const int Mod37BitPosition[] = {
825-
-1, 0, 1, 26, 2, 23, 27, 0, 3, 16, 24, 30, 28, 11, 0, 13, 4,
826-
7, 17, 0, 25, 22, 31, 15, 29, 10, 12, 6, 0, 21, 14, 9, 5,
827-
20, 8, 19, 18};
828-
#endif
829-
830821
if (is0 & RUSB2_INTSTS0_NRDY_Msk) {
831822
const unsigned m = rusb->NRDYENB;
832823
unsigned s = rusb->NRDYSTS & m;
833824
rusb->NRDYSTS = ~s;
834825
while (s) {
835-
#if defined(__CCRX__)
836-
const unsigned num = Mod37BitPosition[(-s & s) % 37];
837-
#else
838826
const unsigned num = __builtin_ctz(s);
839-
#endif
840827
process_pipe_nrdy(rhport, num);
841828
s &= ~TU_BIT(num);
842829
}
@@ -847,11 +834,7 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
847834
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
848835
rusb->BRDYSTS = ~s;
849836
while (s) {
850-
#if defined(__CCRX__)
851-
const unsigned num = Mod37BitPosition[(-s & s) % 37];
852-
#else
853837
const unsigned num = __builtin_ctz(s);
854-
#endif
855838
process_pipe_brdy(rhport, num);
856839
s &= ~TU_BIT(num);
857840
}

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