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Enable SIM_IO_TIME_MS for normal operation.
Signed-off-by: HiFiPhile <[email protected]>
1 parent f43100b commit 5197c1a

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-3
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+10
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examples/device/cdc_msc_freertos/src/msc_disk.c

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030

3131
#if CFG_TUD_MSC_ASYNC_IO
3232
// Simulate read/write operation time
33-
#define SIM_IO_TIME_MS 20
33+
#define SIM_IO_TIME_MS 0
3434

35+
#if CFG_TUD_MSC_ASYNC_IO
3536
TimerHandle_t sim_io_ops_timer;
3637
static int32_t bytes_processed;
3738
#if configSUPPORT_STATIC_ALLOCATION
@@ -238,9 +239,12 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
238239
}
239240

240241
#if CFG_TUD_MSC_ASYNC_IO
241-
// Simulate read operation
242+
// Simulate background read operation
242243
bytes_processed = ret;
243244
xTimerStart(sim_io_ops_timer, 0);
245+
#elif SIM_IO_TIME_MS > 0
246+
// Simulate read operation
247+
tusb_time_delay_ms_api(SIM_IO_TIME_MS);
244248
#endif
245249

246250
return ret;
@@ -284,9 +288,12 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
284288
#endif
285289

286290
#if CFG_TUD_MSC_ASYNC_IO
287-
// Simulate read operation
291+
// Simulate background write operation
288292
bytes_processed = ret;
289293
xTimerStart(sim_io_ops_timer, 0);
294+
#elif SIM_IO_TIME_MS > 0
295+
// Simulate write operation
296+
tusb_time_delay_ms_api(SIM_IO_TIME_MS);
290297
#endif
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292299
return ret;

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