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Commit a40722b

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Enable SIM_IO_TIME_MS for normal operation.
Signed-off-by: HiFiPhile <[email protected]>
1 parent f43100b commit a40722b

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1 file changed

+10
-4
lines changed

1 file changed

+10
-4
lines changed

examples/device/cdc_msc_freertos/src/msc_disk.c

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,10 +28,10 @@
2828

2929
#if CFG_TUD_MSC
3030

31-
#if CFG_TUD_MSC_ASYNC_IO
3231
// Simulate read/write operation time
33-
#define SIM_IO_TIME_MS 20
32+
#define SIM_IO_TIME_MS 0
3433

34+
#if CFG_TUD_MSC_ASYNC_IO
3535
TimerHandle_t sim_io_ops_timer;
3636
static int32_t bytes_processed;
3737
#if configSUPPORT_STATIC_ALLOCATION
@@ -238,9 +238,12 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
238238
}
239239

240240
#if CFG_TUD_MSC_ASYNC_IO
241-
// Simulate read operation
241+
// Simulate background read operation
242242
bytes_processed = ret;
243243
xTimerStart(sim_io_ops_timer, 0);
244+
#elif SIM_IO_TIME_MS > 0
245+
// Simulate read operation
246+
tusb_time_delay_ms_api(SIM_IO_TIME_MS);
244247
#endif
245248

246249
return ret;
@@ -284,9 +287,12 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
284287
#endif
285288

286289
#if CFG_TUD_MSC_ASYNC_IO
287-
// Simulate read operation
290+
// Simulate background write operation
288291
bytes_processed = ret;
289292
xTimerStart(sim_io_ops_timer, 0);
293+
#elif SIM_IO_TIME_MS > 0
294+
// Simulate write operation
295+
tusb_time_delay_ms_api(SIM_IO_TIME_MS);
290296
#endif
291297

292298
return ret;

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