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Expand file tree Collapse file tree Original file line number Diff line number Diff line change @@ -75,7 +75,7 @@ cd $HCL_HOME/samples/optical_flow
7575
7676# 2. setup execution environment
7777source /opt/xilinx/xrt/setup.sh
78- export XDEVICE=/opt/xilinx/platforms/xilinx_u250_gen3x16_xdma_2_1_202010_1/xilinx_u250_gen3x16_xdma_2_1_202010_1 .xpfm
78+ export XDEVICE=/opt/xilinx/platforms/xilinx_u280_xdma_201920_3/xilinx_u280_xdma_201920_3 .xpfm
7979
8080# 3. run the HLS code generation and hardware synthesis (a few mins)
8181# after hardware synthesis, you will see the synthesis report
@@ -91,7 +91,7 @@ python case_study_optical_flow.py
9191# the source code and utility files are generated under "project" folder.
9292vi project/kernel.cpp
9393vi project/host.cpp
94- vi project/_x.hw.xilinx_u250_gen3x16_xdma_2_1_202010_1 /reports/kernel/hls_reports/test_csynth.rpt
94+ vi project/_x.hw.xilinx_u280_xdma_201920_3 /reports/kernel/hls_reports/test_csynth.rpt
9595
9696# 5. compile the HLS code into bitstream (this takes hours to finish)
9797cd project; make all TARGET=hw DEVICE=$XDEVICE
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