virtio: PCI BAR mapping may be accessing invalid slots

According to the [`pci-types` documentation](https://docs.rs/pci_types/0.10.0/pci_types/struct.EndpointHeader.html#note), the `EndpointHeader::bar` function should not be called on slots that make up the second part of a 64-bit BAR. However, `map_bar_mem` calls the function (indirectly) for all slots in the maximum BAR count range, without checking if the previous BAR was 64-bits.
https://github.com/hermit-os/kernel/blob/0245c53293d0f4d1de879f76e3c84717407b05a5/src/drivers/virtio/env.rs#L33-L41

Additionally, it seems like the BARs are always 64-bit based on the lines below:
https://github.com/hermit-os/kernel/blob/0245c53293d0f4d1de879f76e3c84717407b05a5/src/drivers/pci.rs#L147-L150

	pub(crate) fn map_bar_mem(
	device: &PciDevice<PciConfigRegion>,
	) -> Result<Vec<VirtioPciBar>, PciError> {
	let mapped_bars: Vec<VirtioPciBar> = (0..u8::try_from(MAX_BARS).unwrap())
	.filter_map(\|i\| {
	device
	.memory_map_bar(i, true)
	.map(\|(addr, size)\| (i, addr, size))
	})

Provide feedback

Saved searches

Use saved searches to filter your results more quickly

virtio: PCI BAR mapping may be accessing invalid slots #1392

Metadata

Assignees

Labels

Type

Projects

Milestone

Relationships

Development

	if width != 64 {
	warn!("Currently only mapping of 64 bit bars is supported!");
	return None;
	}