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Commit 8643159

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author
cesare
committed
Clean up bare-metal-lib.patch
1 parent 746ccbf commit 8643159

4 files changed

Lines changed: 153 additions & 9 deletions

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‎apps/hart0/zone2/main.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -156,8 +156,7 @@ int main (void){
156156
CSRC(mstatus, 1 << 3);
157157
for (;;)
158158
;
159-
} else
160-
MZONE_SEND(zone, msg);
159+
} //else MZONE_SEND(zone, msg);
161160

162161
msg[0] = '\0';
163162

‎apps/hart0/zone3/main.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,8 +37,7 @@ int main (void){
3737
CSRC(mstatus, 1<<3);
3838
else if (strcmp("mie=1", msg)==0)
3939
CSRS(mstatus, 1<<3);
40-
else
41-
MZONE_SEND(zone, msg);
40+
//else MZONE_SEND(zone, msg);
4241
}
4342

4443
}

‎apps/hart0/zone4/main.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,8 +37,7 @@ int main (void){
3737
CSRC(mstatus, 1<<3);
3838
else if (strcmp("mie=1", msg)==0)
3939
CSRS(mstatus, 1<<3);
40-
else
41-
MZONE_SEND(zone, msg);
40+
//else MZONE_SEND(zone, msg);
4241
}
4342

4443
}

‎ext/bare-metal-lib.patch‎

Lines changed: 150 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,160 @@
1+
diff --git a/src/platform/mpfs_hal/common/mss_mtrap.c b/src/platform/mpfs_hal/common/mss_mtrap.c
2+
index 150a449..3672e72 100644
3+
--- a/src/platform/mpfs_hal/common/mss_mtrap.c
4+
+++ b/src/platform/mpfs_hal/common/mss_mtrap.c
5+
@@ -1,10 +1,6 @@
6+
/*******************************************************************************
7+
- * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
8+
- *
9+
- * SPDX-License-Identifier: MIT
10+
- *
11+
- * MPFS HAL Embedded Software
12+
- *
13+
+ * See LICENSE for license details.
14+
+ * Modifications copyright (C) 2021 Hex Five Security, Inc.
15+
*/
16+
17+
/***************************************************************************
18+
@@ -32,6 +28,13 @@ void pmp_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc);
19+
void trap_from_machine_mode(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc);
20+
void bad_trap(uintptr_t* regs, uintptr_t dummy, uintptr_t mepc);
21+
22+
+void handle_m_trap_h0(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc); /* Hex Five mod */
23+
+void handle_m_trap_h1(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc); /* Hex Five mod */
24+
+void handle_m_trap_h2(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc); /* Hex Five mod */
25+
+void handle_m_trap_h3(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc); /* Hex Five mod */
26+
+void handle_m_trap_h4(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc); /* Hex Five mod */
27+
+void handle_m_trap(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc); /* Hex Five mod */
28+
+
29+
30+
void bad_trap(uintptr_t* regs, uintptr_t dummy, uintptr_t mepc)
31+
{
32+
@@ -748,34 +751,65 @@ void trap_from_machine_mode(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc)
33+
}
34+
else
35+
{
36+
- uint32_t i;
37+
- while(1)
38+
- {
39+
- /* wait for watchdog */
40+
- i++; /* added some code as SC debugger hangs if in loop doing nothing */
41+
- if(i == 0x1000U)
42+
- {
43+
- i = 0U;
44+
- }
45+
+
46+
+ switch(read_csr(mhartid)) {
47+
+ case 0U: handle_m_trap_h0(regs, mcause, mepc); break;
48+
+ case 1U: handle_m_trap_h1(regs, mcause, mepc); break;
49+
+ case 2U: handle_m_trap_h2(regs, mcause, mepc); break;
50+
+ case 3U: handle_m_trap_h3(regs, mcause, mepc); break;
51+
+ case 4U: handle_m_trap_h4(regs, mcause, mepc); break;
52+
+ default: handle_m_trap(regs, mcause, mepc);
53+
}
54+
- switch(mcause)
55+
- {
56+
57+
- case CAUSE_LOAD_PAGE_FAULT:
58+
- break;
59+
- case CAUSE_STORE_PAGE_FAULT:
60+
- break;
61+
- case CAUSE_FETCH_ACCESS:
62+
- break;
63+
- case CAUSE_LOAD_ACCESS:
64+
- break;
65+
- case CAUSE_STORE_ACCESS:
66+
- break;
67+
- default:
68+
- bad_trap(regs, dummy, mepc);
69+
- break;
70+
+ }
71+
+
72+
+}
73+
+
74+
+__attribute__((weak)) void handle_m_trap_h0(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc){
75+
+ handle_m_trap(regs, dummy, mepc);
76+
+}
77+
+__attribute__((weak)) void handle_m_trap_h1(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc){
78+
+ handle_m_trap(regs, dummy, mepc);
79+
+}
80+
+__attribute__((weak)) void handle_m_trap_h2(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc){
81+
+ handle_m_trap(regs, dummy, mepc);
82+
+}
83+
+__attribute__((weak)) void handle_m_trap_h3(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc){
84+
+ handle_m_trap(regs, dummy, mepc);
85+
+}
86+
+__attribute__((weak)) void handle_m_trap_h4(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc){
87+
+ handle_m_trap(regs, dummy, mepc);
88+
+}
89+
+
90+
+void handle_m_trap(uintptr_t * regs, uintptr_t mcause, uintptr_t mepc) /* Hex Five mod */
91+
+{
92+
+ uint32_t i;
93+
+ while(1)
94+
+ {
95+
+ /* wait for watchdog */
96+
+ i++; /* added some code as SC debugger hangs if in loop doing nothing */
97+
+ if(i == 0x1000U)
98+
+ {
99+
+ i = 0U;
100+
}
101+
}
102+
+ switch(mcause)
103+
+ {
104+
+
105+
+ case CAUSE_LOAD_PAGE_FAULT:
106+
+ break;
107+
+ case CAUSE_STORE_PAGE_FAULT:
108+
+ break;
109+
+ case CAUSE_FETCH_ACCESS:
110+
+ break;
111+
+ case CAUSE_LOAD_ACCESS:
112+
+ break;
113+
+ case CAUSE_STORE_ACCESS:
114+
+ break;
115+
+ default:
116+
+ bad_trap(regs, mcause, mepc);
117+
+ break;
118+
+ }
119+
}
120+
121+
#ifdef __cplusplus
1122
diff --git a/src/platform/mpfs_hal/startup_gcc/mss_entry.S b/src/platform/mpfs_hal/startup_gcc/mss_entry.S
2-
index 9e049de..e07ae56 100644
123+
index 9e049de..989b718 100644
3124
--- a/src/platform/mpfs_hal/startup_gcc/mss_entry.S
4125
+++ b/src/platform/mpfs_hal/startup_gcc/mss_entry.S
5-
@@ -55,7 +55,7 @@ _start:
126+
@@ -1,10 +1,6 @@
127+
/*******************************************************************************
128+
- * Copyright 2019-2020 Microchip Corporation.
129+
- *
130+
- * SPDX-License-Identifier: MIT
131+
- *
132+
- * MPFS HAL Embedded Software
133+
- *
134+
+ * See LICENSE for license details.
135+
+ * Modifications copyright (C) 2021 Hex Five Security, Inc.
136+
*/
137+
138+
/*******************************************************************************
139+
@@ -55,7 +51,7 @@ _start:
6140
csrw medeleg, 0
7141
.skip_e51:
8142
# mscratch must be init to zero- we are not using scratch memory
9143
- csrw mscratch, zero
10144
+ #csrw mscratch, zero
11145
csrw mcause, zero
12146
csrw mepc, zero
13-
/*
147+
/*
148+
diff --git a/src/platform/mpfs_hal/startup_gcc/system_startup.c b/src/platform/mpfs_hal/startup_gcc/system_startup.c
149+
index accd9ea..f4ffd54 100644
150+
--- a/src/platform/mpfs_hal/startup_gcc/system_startup.c
151+
+++ b/src/platform/mpfs_hal/startup_gcc/system_startup.c
152+
@@ -105,7 +105,7 @@ __attribute__((weak)) int main_first_hart(void)
153+
hard_idx = MPFS_HAL_FIRST_HART + 1U;
154+
while( hard_idx <= MPFS_HAL_LAST_HART)
155+
{
156+
- uint32_t wait_count;
157+
+ uint32_t wait_count=0;
158+
159+
switch(sm_check_thread)
160+
{

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