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lclvars.cpp
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// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.
/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XX XX
XX LclVarsInfo XX
XX XX
XX The variables to be used by the code generator. XX
XX XX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
*/
#include "jitpch.h"
#ifdef _MSC_VER
#pragma hdrstop
#endif
#include "emit.h"
#include "registerargconvention.h"
#include "jitstd/algorithm.h"
#include "patchpointinfo.h"
/*****************************************************************************/
#ifdef DEBUG
#if DOUBLE_ALIGN
/* static */
unsigned Compiler::s_lvaDoubleAlignedProcsCount = 0;
#endif
#endif
/*****************************************************************************/
void Compiler::lvaInitTypeRef()
{
/* x86 args look something like this:
[this ptr] [hidden return buffer] [declared arguments]* [generic context] [var arg cookie]
x64 is closer to the native ABI:
[this ptr] [hidden return buffer] [generic context] [var arg cookie] [declared arguments]*
(Note: prior to .NET Framework 4.5.1 for Windows 8.1 (but not .NET Framework 4.5.1 "downlevel"),
the "hidden return buffer" came before the "this ptr". Now, the "this ptr" comes first. This
is different from the C++ order, where the "hidden return buffer" always comes first.)
ARM and ARM64 are the same as the current x64 convention:
[this ptr] [hidden return buffer] [generic context] [var arg cookie] [declared arguments]*
Key difference:
The var arg cookie and generic context are swapped with respect to the user arguments
*/
/* Set compArgsCount and compLocalsCount */
info.compArgsCount = info.compMethodInfo->args.numArgs;
// Is there a 'this' pointer
if (!info.compIsStatic)
{
info.compArgsCount++;
}
else
{
info.compThisArg = BAD_VAR_NUM;
}
info.compILargsCount = info.compArgsCount;
// Initialize "compRetNativeType" (along with "compRetTypeDesc"):
//
// 1. For structs returned via a return buffer, or in multiple registers, make it TYP_STRUCT.
// 2. For structs returned in a single register, make it the corresponding primitive type.
// 3. For primitives, leave it as-is. Note this makes it "incorrect" for soft-FP conventions.
//
ReturnTypeDesc retTypeDesc;
retTypeDesc.InitializeReturnType(this, info.compRetType, info.compMethodInfo->args.retTypeClass, info.compCallConv);
compRetTypeDesc = retTypeDesc;
unsigned returnRegCount = retTypeDesc.GetReturnRegCount();
bool hasRetBuffArg = false;
if (returnRegCount > 1)
{
info.compRetNativeType = varTypeIsMultiReg(info.compRetType) ? info.compRetType : TYP_STRUCT;
}
else if (returnRegCount == 1)
{
info.compRetNativeType = retTypeDesc.GetReturnRegType(0);
}
else
{
hasRetBuffArg = info.compRetType != TYP_VOID;
info.compRetNativeType = hasRetBuffArg ? TYP_STRUCT : TYP_VOID;
}
// Do we have a RetBuffArg?
if (hasRetBuffArg)
{
info.compArgsCount++;
}
else
{
info.compRetBuffArg = BAD_VAR_NUM;
}
#if defined(DEBUG) && defined(SWIFT_SUPPORT)
if (verbose && (info.compCallConv == CorInfoCallConvExtension::Swift) && varTypeIsStruct(info.compRetType))
{
CORINFO_CLASS_HANDLE retTypeHnd = info.compMethodInfo->args.retTypeClass;
const CORINFO_SWIFT_LOWERING* lowering = GetSwiftLowering(retTypeHnd);
if (lowering->byReference)
{
printf("Swift compilation returns %s by reference\n", typGetObjLayout(retTypeHnd)->GetClassName());
}
else
{
printf("Swift compilation returns %s as %d primitive(s) in registers\n",
typGetObjLayout(retTypeHnd)->GetClassName(), lowering->numLoweredElements);
for (size_t i = 0; i < lowering->numLoweredElements; i++)
{
printf(" [%zu] @ +%02u: %s\n", i, lowering->offsets[i],
varTypeName(JitType2PreciseVarType(lowering->loweredElements[i])));
}
}
}
#endif
/* There is a 'hidden' cookie pushed last when the
calling convention is varargs */
if (info.compIsVarArgs)
{
info.compArgsCount++;
}
// Is there an extra parameter used to pass instantiation info to
// shared generic methods and shared generic struct instance methods?
if (info.compMethodInfo->args.callConv & CORINFO_CALLCONV_PARAMTYPE)
{
info.compArgsCount++;
}
else
{
info.compTypeCtxtArg = BAD_VAR_NUM;
}
lvaCount = info.compLocalsCount = info.compArgsCount + info.compMethodInfo->locals.numArgs;
info.compILlocalsCount = info.compILargsCount + info.compMethodInfo->locals.numArgs;
/* Now allocate the variable descriptor table */
if (compIsForInlining())
{
lvaTable = impInlineInfo->InlinerCompiler->lvaTable;
lvaCount = impInlineInfo->InlinerCompiler->lvaCount;
lvaTableCnt = impInlineInfo->InlinerCompiler->lvaTableCnt;
// No more stuff needs to be done.
return;
}
lvaTableCnt = lvaCount * 2;
if (lvaTableCnt < 16)
{
lvaTableCnt = 16;
}
lvaTable = getAllocator(CMK_LvaTable).allocate<LclVarDsc>(lvaTableCnt);
size_t tableSize = lvaTableCnt * sizeof(*lvaTable);
memset((void*)lvaTable, 0, tableSize);
for (unsigned i = 0; i < lvaTableCnt; i++)
{
new (&lvaTable[i], jitstd::placement_t()) LclVarDsc(); // call the constructor.
}
//-------------------------------------------------------------------------
// Count the arguments and initialize the respective lvaTable[] entries
//
// First the implicit arguments
//-------------------------------------------------------------------------
InitVarDscInfo varDscInfo;
#ifdef TARGET_X86
// x86 unmanaged calling conventions limit the number of registers supported
// for accepting arguments. As a result, we need to modify the number of registers
// when we emit a method with an unmanaged calling convention.
switch (info.compCallConv)
{
case CorInfoCallConvExtension::Thiscall:
// In thiscall the this parameter goes into a register.
varDscInfo.Init(lvaTable, hasRetBuffArg, 1, 0);
break;
case CorInfoCallConvExtension::C:
case CorInfoCallConvExtension::Stdcall:
case CorInfoCallConvExtension::CMemberFunction:
case CorInfoCallConvExtension::StdcallMemberFunction:
varDscInfo.Init(lvaTable, hasRetBuffArg, 0, 0);
break;
case CorInfoCallConvExtension::Managed:
case CorInfoCallConvExtension::Fastcall:
case CorInfoCallConvExtension::FastcallMemberFunction:
default:
varDscInfo.Init(lvaTable, hasRetBuffArg, MAX_REG_ARG, MAX_FLOAT_REG_ARG);
break;
}
#else
varDscInfo.Init(lvaTable, hasRetBuffArg, MAX_REG_ARG, MAX_FLOAT_REG_ARG);
#endif
lvaInitArgs(&varDscInfo);
//-------------------------------------------------------------------------
// Finally the local variables
//-------------------------------------------------------------------------
unsigned varNum = varDscInfo.varNum;
LclVarDsc* varDsc = varDscInfo.varDsc;
CORINFO_ARG_LIST_HANDLE localsSig = info.compMethodInfo->locals.args;
#if defined(TARGET_ARM) || defined(TARGET_RISCV64)
compHasSplitParam = varDscInfo.hasSplitParam;
#endif // TARGET_ARM || TARGET_RISCV64
for (unsigned i = 0; i < info.compMethodInfo->locals.numArgs;
i++, varNum++, varDsc++, localsSig = info.compCompHnd->getArgNext(localsSig))
{
CORINFO_CLASS_HANDLE typeHnd;
CorInfoTypeWithMod corInfoTypeWithMod =
info.compCompHnd->getArgType(&info.compMethodInfo->locals, localsSig, &typeHnd);
CorInfoType corInfoType = strip(corInfoTypeWithMod);
lvaInitVarDsc(varDsc, varNum, corInfoType, typeHnd, localsSig, &info.compMethodInfo->locals);
if ((corInfoTypeWithMod & CORINFO_TYPE_MOD_PINNED) != 0)
{
if ((corInfoType == CORINFO_TYPE_CLASS) || (corInfoType == CORINFO_TYPE_BYREF))
{
JITDUMP("Setting lvPinned for V%02u\n", varNum);
varDsc->lvPinned = 1;
if (opts.IsOSR())
{
// OSR method may not see any references to the pinned local,
// but must still report it in GC info.
//
varDsc->lvImplicitlyReferenced = 1;
}
}
else
{
JITDUMP("Ignoring pin for non-GC type V%02u\n", varNum);
}
}
varDsc->lvOnFrame = true; // The final home for this local variable might be our local stack frame
if (corInfoType == CORINFO_TYPE_CLASS)
{
CORINFO_CLASS_HANDLE clsHnd = info.compCompHnd->getArgClass(&info.compMethodInfo->locals, localsSig);
lvaSetClass(varNum, clsHnd);
}
}
if ( // If there already exist unsafe buffers, don't mark more structs as unsafe
// as that will cause them to be placed along with the real unsafe buffers,
// unnecessarily exposing them to overruns. This can affect GS tests which
// intentionally do buffer-overruns.
!getNeedsGSSecurityCookie() &&
// GS checks require the stack to be re-ordered, which can't be done with EnC
!opts.compDbgEnC && compStressCompile(STRESS_UNSAFE_BUFFER_CHECKS, 25))
{
setNeedsGSSecurityCookie();
compGSReorderStackLayout = true;
for (unsigned i = 0; i < lvaCount; i++)
{
if ((lvaTable[i].lvType == TYP_STRUCT) && compStressCompile(STRESS_GENERIC_VARN, 60))
{
lvaTable[i].lvIsUnsafeBuffer = true;
}
}
}
// If this is an OSR method, mark all the OSR locals.
//
// Do this before we add the GS Cookie Dummy or Outgoing args to the locals
// so we don't have to do special checks to exclude them.
//
if (opts.IsOSR())
{
for (unsigned lclNum = 0; lclNum < lvaCount; lclNum++)
{
LclVarDsc* const varDsc = lvaGetDesc(lclNum);
varDsc->lvIsOSRLocal = true;
if (info.compPatchpointInfo->IsExposed(lclNum))
{
JITDUMP("-- V%02u is OSR exposed\n", lclNum);
varDsc->lvIsOSRExposedLocal = true;
// Ensure that ref counts for exposed OSR locals take into account
// that some of the refs might be in the Tier0 parts of the method
// that get trimmed away.
//
varDsc->lvImplicitlyReferenced = 1;
}
}
}
if (getNeedsGSSecurityCookie())
{
// Ensure that there will be at least one stack variable since
// we require that the GSCookie does not have a 0 stack offset.
unsigned dummy = lvaGrabTempWithImplicitUse(false DEBUGARG("GSCookie dummy"));
LclVarDsc* gsCookieDummy = lvaGetDesc(dummy);
gsCookieDummy->lvType = TYP_INT;
gsCookieDummy->lvIsTemp = true; // It is not alive at all, set the flag to prevent zero-init.
lvaSetVarDoNotEnregister(dummy DEBUGARG(DoNotEnregisterReason::VMNeedsStackAddr));
}
// Allocate the lvaOutgoingArgSpaceVar now because we can run into problems in the
// emitter when the varNum is greater that 32767 (see emitLclVarAddr::initLclVarAddr)
lvaAllocOutgoingArgSpaceVar();
#ifdef DEBUG
if (verbose)
{
lvaTableDump(INITIAL_FRAME_LAYOUT);
}
#endif
}
/*****************************************************************************/
void Compiler::lvaInitArgs(InitVarDscInfo* varDscInfo)
{
compArgSize = 0;
#if defined(TARGET_ARM) && defined(PROFILING_SUPPORTED)
// Prespill all argument regs on to stack in case of Arm when under profiler.
// We do this as the arm32 CORINFO_HELP_FCN_ENTER helper does not preserve
// these registers, and is called very early.
if (compIsProfilerHookNeeded())
{
codeGen->regSet.rsMaskPreSpillRegArg |= RBM_ARG_REGS;
}
#endif
//----------------------------------------------------------------------
// Is there a "this" pointer ?
lvaInitThisPtr(varDscInfo);
unsigned numUserArgsToSkip = 0;
unsigned numUserArgs = info.compMethodInfo->args.numArgs;
#if !defined(TARGET_ARM)
if (TargetOS::IsWindows && callConvIsInstanceMethodCallConv(info.compCallConv))
{
// If we are a native instance method, handle the first user arg
// (the unmanaged this parameter) and then handle the hidden
// return buffer parameter.
assert(numUserArgs >= 1);
lvaInitUserArgs(varDscInfo, 0, 1);
numUserArgsToSkip++;
numUserArgs--;
lvaInitRetBuffArg(varDscInfo, false);
}
else
#endif
{
/* If we have a hidden return-buffer parameter, that comes here */
lvaInitRetBuffArg(varDscInfo, true);
}
//======================================================================
#if USER_ARGS_COME_LAST
//@GENERICS: final instantiation-info argument for shared generic methods
// and shared generic struct instance methods
lvaInitGenericsCtxt(varDscInfo);
/* If the method is varargs, process the varargs cookie */
lvaInitVarArgsHandle(varDscInfo);
#endif
//-------------------------------------------------------------------------
// Now walk the function signature for the explicit user arguments
//-------------------------------------------------------------------------
lvaInitUserArgs(varDscInfo, numUserArgsToSkip, numUserArgs);
#if !USER_ARGS_COME_LAST
//@GENERICS: final instantiation-info argument for shared generic methods
// and shared generic struct instance methods
lvaInitGenericsCtxt(varDscInfo);
/* If the method is varargs, process the varargs cookie */
lvaInitVarArgsHandle(varDscInfo);
#endif
//----------------------------------------------------------------------
// We have set info.compArgsCount in compCompile()
noway_assert(varDscInfo->varNum == info.compArgsCount);
assert(varDscInfo->intRegArgNum <= MAX_REG_ARG);
codeGen->intRegState.rsCalleeRegArgCount = varDscInfo->intRegArgNum;
codeGen->floatRegState.rsCalleeRegArgCount = varDscInfo->floatRegArgNum;
#if FEATURE_FASTTAILCALL
// Save the stack usage information
// We can get register usage information using codeGen->intRegState and
// codeGen->floatRegState
info.compArgStackSize = varDscInfo->stackArgSize;
#endif // FEATURE_FASTTAILCALL
// Now we have parameters created in the right order. Figure out how they're passed.
lvaClassifyParameterABI();
// The total argument size must be aligned.
noway_assert((compArgSize % TARGET_POINTER_SIZE) == 0);
#ifdef TARGET_X86
/* We can not pass more than 2^16 dwords as arguments as the "ret"
instruction can only pop 2^16 arguments. Could be handled correctly
but it will be very difficult for fully interruptible code */
if (compArgSize != (size_t)(unsigned short)compArgSize)
IMPL_LIMITATION("Too many arguments for the \"ret\" instruction to pop");
#endif
}
/*****************************************************************************/
void Compiler::lvaInitThisPtr(InitVarDscInfo* varDscInfo)
{
LclVarDsc* varDsc = varDscInfo->varDsc;
if (!info.compIsStatic)
{
varDsc->lvIsParam = 1;
varDsc->lvIsPtr = 1;
lvaArg0Var = info.compThisArg = varDscInfo->varNum;
noway_assert(info.compThisArg == 0);
if (eeIsValueClass(info.compClassHnd))
{
varDsc->lvType = TYP_BYREF;
}
else
{
varDsc->lvType = TYP_REF;
lvaSetClass(varDscInfo->varNum, info.compClassHnd);
}
varDsc->lvIsRegArg = 1;
noway_assert(varDscInfo->intRegArgNum == 0);
varDsc->SetArgReg(
genMapRegArgNumToRegNum(varDscInfo->allocRegArg(TYP_INT), varDsc->TypeGet(), info.compCallConv));
#if FEATURE_MULTIREG_ARGS
varDsc->SetOtherArgReg(REG_NA);
#endif
varDsc->lvOnFrame = true; // The final home for this incoming register might be our local stack frame
#ifdef DEBUG
if (verbose)
{
printf("'this' passed in register %s\n", getRegName(varDsc->GetArgReg()));
}
#endif
compArgSize += TARGET_POINTER_SIZE;
varDscInfo->nextParam();
}
}
/*****************************************************************************/
void Compiler::lvaInitRetBuffArg(InitVarDscInfo* varDscInfo, bool useFixedRetBufReg)
{
if (varDscInfo->hasRetBufArg)
{
info.compRetBuffArg = varDscInfo->varNum;
LclVarDsc* varDsc = varDscInfo->varDsc;
varDsc->lvType = TYP_BYREF;
varDsc->lvIsParam = 1;
varDsc->lvIsRegArg = 0;
if (useFixedRetBufReg && hasFixedRetBuffReg(info.compCallConv))
{
varDsc->lvIsRegArg = 1;
varDsc->SetArgReg(theFixedRetBuffReg(info.compCallConv));
}
else if (varDscInfo->canEnreg(TYP_INT))
{
varDsc->lvIsRegArg = 1;
unsigned retBuffArgNum = varDscInfo->allocRegArg(TYP_INT);
varDsc->SetArgReg(genMapIntRegArgNumToRegNum(retBuffArgNum, info.compCallConv));
}
else
{
varDscInfo->stackArgSize = roundUp(varDscInfo->stackArgSize, TARGET_POINTER_SIZE);
varDsc->SetStackOffset(varDscInfo->stackArgSize);
varDscInfo->stackArgSize += TARGET_POINTER_SIZE;
}
#if FEATURE_MULTIREG_ARGS
varDsc->SetOtherArgReg(REG_NA);
#endif
varDsc->lvOnFrame = true; // The final home for this incoming register might be our local stack frame
assert(!varDsc->lvIsRegArg || isValidIntArgReg(varDsc->GetArgReg(), info.compCallConv));
#ifdef DEBUG
if (varDsc->lvIsRegArg && verbose)
{
printf("'__retBuf' passed in register %s\n", getRegName(varDsc->GetArgReg()));
}
#endif
compArgSize += TARGET_POINTER_SIZE;
varDscInfo->nextParam();
}
}
//-----------------------------------------------------------------------------
// lvaInitUserArgs:
// Initialize local var descriptions for incoming user arguments
//
// Arguments:
// varDscInfo - the local var descriptions
// skipArgs - the number of user args to skip processing.
// takeArgs - the number of user args to process (after skipping skipArgs number of args)
//
void Compiler::lvaInitUserArgs(InitVarDscInfo* varDscInfo, unsigned skipArgs, unsigned takeArgs)
{
//-------------------------------------------------------------------------
// Walk the function signature for the explicit arguments
//-------------------------------------------------------------------------
#if defined(TARGET_X86)
// Only (some of) the implicit args are enregistered for varargs
if (info.compIsVarArgs)
{
varDscInfo->maxIntRegArgNum = varDscInfo->intRegArgNum;
}
#elif defined(TARGET_AMD64) && !defined(UNIX_AMD64_ABI)
// On System V type environment the float registers are not indexed together with the int ones.
varDscInfo->floatRegArgNum = varDscInfo->intRegArgNum;
#endif // TARGET*
CORINFO_ARG_LIST_HANDLE argLst = info.compMethodInfo->args.args;
const unsigned argSigLen = info.compMethodInfo->args.numArgs;
// We will process at most takeArgs arguments from the signature after skipping skipArgs arguments
const int64_t numUserArgs = min((int64_t)takeArgs, (argSigLen - (int64_t)skipArgs));
// If there are no user args or less than skipArgs args, return here since there's no work to do.
if (numUserArgs <= 0)
{
return;
}
#ifdef TARGET_ARM
regMaskTP doubleAlignMask = RBM_NONE;
#endif // TARGET_ARM
// Skip skipArgs arguments from the signature.
for (unsigned i = 0; i < skipArgs; i++, argLst = info.compCompHnd->getArgNext(argLst))
{
;
}
// Process each user arg.
for (unsigned i = 0; i < numUserArgs; i++, varDscInfo->nextParam(), argLst = info.compCompHnd->getArgNext(argLst))
{
LclVarDsc* varDsc = varDscInfo->varDsc;
CORINFO_CLASS_HANDLE typeHnd = nullptr;
CorInfoTypeWithMod corInfoType = info.compCompHnd->getArgType(&info.compMethodInfo->args, argLst, &typeHnd);
varDsc->lvIsParam = 1;
#if defined(TARGET_X86) && defined(FEATURE_IJW)
if ((corInfoType & CORINFO_TYPE_MOD_COPY_WITH_HELPER) != 0)
{
CorInfoType typeWithoutMod = strip(corInfoType);
if (typeWithoutMod == CORINFO_TYPE_VALUECLASS || typeWithoutMod == CORINFO_TYPE_PTR ||
typeWithoutMod == CORINFO_TYPE_BYREF)
{
JITDUMP("Marking user arg%02u as requiring special copy semantics\n", i);
recordArgRequiresSpecialCopy(i);
}
}
#endif // TARGET_X86 && FEATURE_IJW
lvaInitVarDsc(varDsc, varDscInfo->varNum, strip(corInfoType), typeHnd, argLst, &info.compMethodInfo->args);
if (strip(corInfoType) == CORINFO_TYPE_CLASS)
{
CORINFO_CLASS_HANDLE clsHnd = info.compCompHnd->getArgClass(&info.compMethodInfo->args, argLst);
lvaSetClass(varDscInfo->varNum, clsHnd);
}
// The final home for this incoming parameter might be our local stack frame.
varDsc->lvOnFrame = true;
#ifdef SWIFT_SUPPORT
if (info.compCallConv == CorInfoCallConvExtension::Swift)
{
if (varTypeIsSIMD(varDsc))
{
IMPL_LIMITATION("SIMD types are currently unsupported in Swift reverse pinvokes");
}
if (lvaInitSpecialSwiftParam(argLst, varDscInfo, strip(corInfoType), typeHnd))
{
continue;
}
if (varDsc->TypeGet() == TYP_STRUCT)
{
// Struct parameters are lowered to separate primitives in the
// Swift calling convention. We cannot handle these patterns
// efficiently, so we always DNER them and home them to stack
// in the prolog.
lvaSetVarDoNotEnregister(varDscInfo->varNum DEBUGARG(DoNotEnregisterReason::IsStructArg));
}
}
#endif
// For ARM, ARM64, LOONGARCH64, RISCV64 and AMD64 varargs, all arguments go in integer registers
var_types argType = mangleVarArgsType(varDsc->TypeGet());
var_types origArgType = argType;
// ARM softfp calling convention should affect only the floating point arguments.
// Otherwise there appear too many surplus pre-spills and other memory operations
// with the associated locations .
bool isSoftFPPreSpill = opts.compUseSoftFP && varTypeIsFloating(varDsc->TypeGet());
unsigned argSize = eeGetArgSize(strip(corInfoType), typeHnd);
unsigned cSlots =
(argSize + TARGET_POINTER_SIZE - 1) / TARGET_POINTER_SIZE; // the total number of slots of this argument
bool isHfaArg = false;
var_types hfaType = TYP_UNDEF;
// Methods that use VarArg or SoftFP cannot have HFA arguments except
// Native varargs on arm64 unix use the regular calling convention.
if (((TargetOS::IsUnix && TargetArchitecture::IsArm64) || !info.compIsVarArgs) && !opts.compUseSoftFP)
{
// If the argType is a struct, then check if it is an HFA
if (varTypeIsStruct(argType))
{
// hfaType is set to float, double, or SIMD type if it is an HFA, otherwise TYP_UNDEF
hfaType = GetHfaType(typeHnd);
isHfaArg = varTypeIsValidHfaType(hfaType);
}
}
else if (info.compIsVarArgs)
{
// Currently native varargs is not implemented on non windows targets.
//
// Note that some targets like Arm64 Unix should not need much work as
// the ABI is the same. While other targets may only need small changes
// such as amd64 Unix, which just expects RAX to pass numFPArguments.
if (TargetOS::IsUnix)
{
NYI("InitUserArgs for Vararg callee is not yet implemented on non Windows targets.");
}
}
if (isHfaArg)
{
// We have an HFA argument, so from here on out treat the type as a float, double, or vector.
// The original struct type is available by using origArgType.
// We also update the cSlots to be the number of float/double/vector fields in the HFA.
argType = hfaType; // TODO-Cleanup: remove this assignment and mark `argType` as const.
varDsc->SetHfaType(hfaType);
cSlots = varDsc->lvHfaSlots();
}
// The number of slots that must be enregistered if we are to consider this argument enregistered.
// This is normally the same as cSlots, since we normally either enregister the entire object,
// or none of it. For structs on ARM, however, we only need to enregister a single slot to consider
// it enregistered, as long as we can split the rest onto the stack.
unsigned cSlotsToEnregister = cSlots;
#if defined(TARGET_ARM64)
if (compFeatureArgSplit())
{
// On arm64 Windows we will need to properly handle the case where a >8byte <=16byte
// struct (or vector) is split between register r7 and virtual stack slot s[0].
// We will only do this for calls to vararg methods on Windows Arm64.
// SIMD types (for which `varTypeIsStruct()` returns `true`) are also passed in general-purpose
// registers and can be split between registers and stack with Windows arm64 native varargs.
//
// !!This does not affect the normal arm64 calling convention or Unix Arm64!!
if (info.compIsVarArgs && (cSlots > 1))
{
if (varDscInfo->canEnreg(TYP_INT, 1) && // The beginning of the struct can go in a register
!varDscInfo->canEnreg(TYP_INT, cSlots)) // The end of the struct can't fit in a register
{
cSlotsToEnregister = 1; // Force the split
varDscInfo->stackArgSize += TARGET_POINTER_SIZE;
}
}
}
#endif // defined(TARGET_ARM64)
#ifdef TARGET_ARM
// On ARM we pass the first 4 words of integer arguments and non-HFA structs in registers.
// But we pre-spill user arguments in varargs methods and structs.
//
unsigned cAlign;
bool preSpill = info.compIsVarArgs || isSoftFPPreSpill;
switch (origArgType)
{
case TYP_STRUCT:
assert(varDsc->lvSize() == argSize);
cAlign = varDsc->lvStructDoubleAlign ? 2 : 1;
// HFA arguments go on the stack frame. They don't get spilled in the prolog like struct
// arguments passed in the integer registers but get homed immediately after the prolog.
if (!isHfaArg)
{
cSlotsToEnregister = 1; // HFAs must be totally enregistered or not, but other structs can be split.
preSpill = true;
}
break;
case TYP_DOUBLE:
case TYP_LONG:
cAlign = 2;
break;
default:
cAlign = 1;
break;
}
if (isRegParamType(argType))
{
compArgSize += varDscInfo->alignReg(argType, cAlign) * REGSIZE_BYTES;
}
if (argType == TYP_STRUCT)
{
// Are we going to split the struct between registers and stack? We can do that as long as
// no floating-point arguments have been put on the stack.
//
// From the ARM Procedure Call Standard:
// Rule C.5: "If the NCRN is less than r4 **and** the NSAA is equal to the SP,"
// then split the argument between registers and stack. Implication: if something
// has already been spilled to the stack, then anything that would normally be
// split between the core registers and the stack will be put on the stack.
// Anything that follows will also be on the stack. However, if something from
// floating point regs has been spilled to the stack, we can still use r0-r3 until they are full.
if (varDscInfo->canEnreg(TYP_INT, 1) && // The beginning of the struct can go in a register
!varDscInfo->canEnreg(TYP_INT, cSlots) && // The end of the struct can't fit in a register
varDscInfo->existAnyFloatStackArgs()) // There's at least one stack-based FP arg already
{
varDscInfo->setAllRegArgUsed(TYP_INT); // Prevent all future use of integer registers
preSpill = false; // This struct won't be prespilled, since it will go on the stack
}
}
if (preSpill)
{
for (unsigned ix = 0; ix < cSlots; ix++)
{
if (!varDscInfo->canEnreg(TYP_INT, ix + 1))
{
break;
}
regMaskTP regMask = genMapArgNumToRegMask(varDscInfo->regArgNum(TYP_INT) + ix, TYP_INT);
if (cAlign == 2)
{
doubleAlignMask |= regMask;
}
codeGen->regSet.rsMaskPreSpillRegArg |= regMask;
}
}
#endif // TARGET_ARM
#if defined(UNIX_AMD64_ABI)
SYSTEMV_AMD64_CORINFO_STRUCT_REG_PASSING_DESCRIPTOR structDesc;
if (varTypeIsStruct(argType))
{
assert(typeHnd != nullptr);
eeGetSystemVAmd64PassStructInRegisterDescriptor(typeHnd, &structDesc);
if (structDesc.passedInRegisters)
{
unsigned intRegCount = 0;
unsigned floatRegCount = 0;
for (unsigned int i = 0; i < structDesc.eightByteCount; i++)
{
if (structDesc.IsIntegralSlot(i))
{
intRegCount++;
}
else if (structDesc.IsSseSlot(i))
{
floatRegCount++;
}
else
{
assert(false && "Invalid eightbyte classification type.");
break;
}
}
if (intRegCount != 0 && !varDscInfo->canEnreg(TYP_INT, intRegCount))
{
structDesc.passedInRegisters = false; // No register to enregister the eightbytes.
}
if (floatRegCount != 0 && !varDscInfo->canEnreg(TYP_FLOAT, floatRegCount))
{
structDesc.passedInRegisters = false; // No register to enregister the eightbytes.
}
}
}
#endif // UNIX_AMD64_ABI
bool canPassArgInRegisters = false;
#if defined(UNIX_AMD64_ABI)
if (varTypeIsStruct(argType))
{
canPassArgInRegisters = structDesc.passedInRegisters;
}
else
#elif defined(TARGET_X86)
if (varTypeIsStruct(argType) && isTrivialPointerSizedStruct(typeHnd))
{
canPassArgInRegisters = varDscInfo->canEnreg(TYP_I_IMPL, cSlotsToEnregister);
}
else
#elif defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
const CORINFO_FPSTRUCT_LOWERING* lowering = nullptr;
var_types argRegTypeInStruct1 = TYP_UNKNOWN;
var_types argRegTypeInStruct2 = TYP_UNKNOWN;
if ((strip(corInfoType) == CORINFO_TYPE_VALUECLASS) && (argSize <= MAX_PASS_MULTIREG_BYTES))
{
lowering = GetFpStructLowering(typeHnd);
}
if ((lowering != nullptr) && !lowering->byIntegerCallConv)
{
assert(varTypeIsStruct(argType));
assert((lowering->numLoweredElements == 1) || (lowering->numLoweredElements == 2));
if (lowering->numLoweredElements == 1)
assert(varDsc->lvExactSize() <= argSize);
cSlotsToEnregister = lowering->numLoweredElements;
argRegTypeInStruct1 = JITtype2varType(lowering->loweredElements[0]);
if (lowering->numLoweredElements == 2)
argRegTypeInStruct2 = JITtype2varType(lowering->loweredElements[1]);
int floatNum = (int)varTypeIsFloating(argRegTypeInStruct1) + (int)varTypeIsFloating(argRegTypeInStruct2);
assert(floatNum > 0);
canPassArgInRegisters = varDscInfo->canEnreg(TYP_DOUBLE, floatNum);
if (canPassArgInRegisters && (floatNum < lowering->numLoweredElements))
{
assert(floatNum == 1);
assert(lowering->numLoweredElements == 2);
assert(varTypeIsIntegralOrI(argRegTypeInStruct1) || varTypeIsIntegralOrI(argRegTypeInStruct2));
canPassArgInRegisters = varDscInfo->canEnreg(TYP_I_IMPL, 1);
}
if (!canPassArgInRegisters)
{
// If a struct eligible for passing according to floating-point calling convention cannot be fully
// enregistered, it is passed according to integer calling convention -- in up to two integer registers
// and/or stack slots, as a lump of bits laid out like in memory.
cSlotsToEnregister = cSlots;
argRegTypeInStruct1 = TYP_UNKNOWN;
argRegTypeInStruct2 = TYP_UNKNOWN;
canPassArgInRegisters = varDscInfo->canEnreg(argType, cSlotsToEnregister);
if (cSlotsToEnregister == 2)
{
if (!canPassArgInRegisters && varDscInfo->canEnreg(TYP_I_IMPL, 1))
{
// Here a struct-arg which needs two registers but only one integer register available,
// it has to be split.
argRegTypeInStruct1 = TYP_I_IMPL;
canPassArgInRegisters = true;
}
}
}
}
else
#endif // defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
{
canPassArgInRegisters = varDscInfo->canEnreg(argType, cSlotsToEnregister);
#if defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// On LoongArch64 and RISCV64, if there aren't any remaining floating-point registers to pass the
// argument, integer registers (if any) are used instead.
if (!canPassArgInRegisters && varTypeIsFloating(argType))
{
canPassArgInRegisters = varDscInfo->canEnreg(TYP_I_IMPL, cSlotsToEnregister);
argType = canPassArgInRegisters ? TYP_I_IMPL : argType;
}
if (!canPassArgInRegisters && (cSlots > 1))
{
// If a struct-arg which needs two registers but only one integer register available,
// it has to be split.
canPassArgInRegisters = varDscInfo->canEnreg(TYP_I_IMPL, 1);
argRegTypeInStruct1 = canPassArgInRegisters ? TYP_I_IMPL : TYP_UNKNOWN;
}
#endif
}
if (canPassArgInRegisters)
{
/* Another register argument */
// Allocate the registers we need. allocRegArg() returns the first argument register number of the set.
// For non-HFA structs, we still "try" to enregister the whole thing; it will just max out if splitting
// to the stack happens.
unsigned firstAllocatedRegArgNum = 0;
#if FEATURE_MULTIREG_ARGS
varDsc->SetOtherArgReg(REG_NA);
#endif // FEATURE_MULTIREG_ARGS
#if defined(UNIX_AMD64_ABI)
unsigned secondAllocatedRegArgNum = 0;
var_types firstEightByteType = TYP_UNDEF;
var_types secondEightByteType = TYP_UNDEF;
if (varTypeIsStruct(argType))
{
if (structDesc.eightByteCount >= 1)
{
firstEightByteType = GetEightByteType(structDesc, 0);
firstAllocatedRegArgNum = varDscInfo->allocRegArg(firstEightByteType, 1);
}
}
else
#elif defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
unsigned secondAllocatedRegArgNum = 0;
if (argRegTypeInStruct1 != TYP_UNKNOWN)
{
firstAllocatedRegArgNum = varDscInfo->allocRegArg(argRegTypeInStruct1, 1);
}
else
#endif // defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
{
firstAllocatedRegArgNum = varDscInfo->allocRegArg(argType, cSlots);
}
if (isHfaArg)
{
// We need to save the fact that this HFA is enregistered.
// Note that we can have HVAs of SIMD types even if we are not recognizing intrinsics.
// In that case, we won't have normalized the vector types on the varDsc, so if we have a single vector
// register, we need to set the type now. Otherwise, later we'll assume this is passed by reference.
if (varDsc->lvHfaSlots() != 1)
{
varDsc->lvIsMultiRegArg = true;
}
}
varDsc->lvIsRegArg = 1;
#if FEATURE_MULTIREG_ARGS
#ifdef TARGET_ARM64
if (argType == TYP_STRUCT)
{
varDsc->SetArgReg(genMapRegArgNumToRegNum(firstAllocatedRegArgNum, TYP_I_IMPL, info.compCallConv));
if (cSlots == 2)
{
varDsc->SetOtherArgReg(
genMapRegArgNumToRegNum(firstAllocatedRegArgNum + 1, TYP_I_IMPL, info.compCallConv));
varDsc->lvIsMultiRegArg = true;
}
}
#elif defined(UNIX_AMD64_ABI)
if (varTypeIsStruct(argType))
{
varDsc->SetArgReg(
genMapRegArgNumToRegNum(firstAllocatedRegArgNum, firstEightByteType, info.compCallConv));
// If there is a second eightbyte, get a register for it too and map the arg to the reg number.
if (structDesc.eightByteCount >= 2)
{