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First, Digital is really great. Congratulation to Mr @hneemann
I am requesting 2 new native parametric (With bit width and RAM size customizable) components in Java for Digital, as they are still missing and are really heavily used in FPGA & 74LSxxx FSM boards : Asynchronous Double Port SRAM and Asynchronous FIFOS allowing easily exchanging data safely and asynchronously between different FSMs. They are heavily used in VHDL design & synthesis, and with 74LSxxx based engines and boards. They are missing. Really. Coding them as sub-circuits in Digital is not the best option according to me, and would be hard with the current set of native java components. We need at least one good native parametric implementations for each of them, and this is in essence my request here.
True double port Async SRAM equivalent to a simplified IDT7006 (Without handling semaphores, to simplify things).
True Async FIFOs SRAM, equivalent to CY7C46xA, with Empty, Half Full and Full output signals.
Could it be possible to add such new native Java components in the native standard library, as the current double port SRAM has its second port in "read only", unfortunately ? And has there are no FIFO implemented yet ?
Such work should be rather easy for Mr @hneemann as Digital is his own project, even if I could see he perfectly described how to create custom components in Java (I saw the sample codes provided, perfectly commented), while it would take me true efforts for not being a good java developer, and for not having culture yet on Digital's internals and architecture. It's not laziness from me to ask him a hand on that, it's just that he is the best person advised to do it nicely and efficiently.
I'd be ready to pay him the work time necessary to implement these new things. If he is not available, I will do it myself but it's really going to be a pain for me as I'm not a good Java developer. It's going to take me a month of work to get it right and get familiar to the whole thing.
@hneemann 's help would be highly appreciated. It would save me a lot of time.
Kind regards,
Frederic
Here are the datasheets of those commonly used Dual Ports Asynch SRAM and FIFOs :
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First, Digital is really great. Congratulation to Mr @hneemann
I am requesting 2 new native parametric (With bit width and RAM size customizable) components in Java for Digital, as they are still missing and are really heavily used in FPGA & 74LSxxx FSM boards : Asynchronous Double Port SRAM and Asynchronous FIFOS allowing easily exchanging data safely and asynchronously between different FSMs. They are heavily used in VHDL design & synthesis, and with 74LSxxx based engines and boards. They are missing. Really. Coding them as sub-circuits in Digital is not the best option according to me, and would be hard with the current set of native java components. We need at least one good native parametric implementations for each of them, and this is in essence my request here.
True double port Async SRAM equivalent to a simplified IDT7006 (Without handling semaphores, to simplify things).
True Async FIFOs SRAM, equivalent to CY7C46xA, with Empty, Half Full and Full output signals.
Could it be possible to add such new native Java components in the native standard library, as the current double port SRAM has its second port in "read only", unfortunately ? And has there are no FIFO implemented yet ?
Such work should be rather easy for Mr @hneemann as Digital is his own project, even if I could see he perfectly described how to create custom components in Java (I saw the sample codes provided, perfectly commented), while it would take me true efforts for not being a good java developer, and for not having culture yet on Digital's internals and architecture. It's not laziness from me to ask him a hand on that, it's just that he is the best person advised to do it nicely and efficiently.
I'd be ready to pay him the work time necessary to implement these new things. If he is not available, I will do it myself but it's really going to be a pain for me as I'm not a good Java developer. It's going to take me a month of work to get it right and get familiar to the whole thing.
@hneemann 's help would be highly appreciated. It would save me a lot of time.
Kind regards,
Frederic
Here are the datasheets of those commonly used Dual Ports Asynch SRAM and FIFOs :
IDT7006 - High Speed 16K x 8 Dual-Port SRAM.pdf
CY7C46xA - Asynchronous, Cascadable 8K, 16K, 32K, and 64K x9 FIFOs.pdf
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